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d3092c60f7
'virsh capabilities' will now include a new <memory> element
per <cell> of the topology, as in:
<topology>
<cells num='2'>
<cell id='0'>
<memory unit='KiB'>12572412</memory>
<cpus num='12'>
...
</cell>
Signed-off-by: Eric Blake <eblake@redhat.com>
89 lines
2.1 KiB
XML
89 lines
2.1 KiB
XML
<capabilities>
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<host>
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<uuid>35383339-3134-5553-4531-30314e394a50</uuid>
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<cpu>
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<arch>x86_64</arch>
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<model>Westmere</model>
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<vendor>Intel</vendor>
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<topology sockets='1' cores='6' threads='2'/>
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<feature name='rdtscp'/>
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<feature name='pdpe1gb'/>
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<feature name='dca'/>
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<feature name='pdcm'/>
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<feature name='xtpr'/>
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<feature name='tm2'/>
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<feature name='est'/>
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<feature name='smx'/>
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<feature name='vmx'/>
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<feature name='ds_cpl'/>
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<feature name='monitor'/>
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<feature name='dtes64'/>
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<feature name='pclmuldq'/>
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<feature name='pbe'/>
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<feature name='tm'/>
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<feature name='ht'/>
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<feature name='ss'/>
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<feature name='acpi'/>
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<feature name='ds'/>
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<feature name='vme'/>
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</cpu>
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<power_management>
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<suspend_disk/>
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</power_management>
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<migration_features>
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<live/>
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<uri_transports>
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<uri_transport>tcp</uri_transport>
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</uri_transports>
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</migration_features>
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<topology>
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<cells num='2'>
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<cell id='0'>
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<memory unit='KiB'>12572412</memory>
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<cpus num='12'>
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<cpu id='0'/>
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<cpu id='2'/>
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<cpu id='4'/>
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<cpu id='6'/>
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<cpu id='8'/>
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<cpu id='10'/>
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<cpu id='12'/>
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<cpu id='14'/>
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<cpu id='16'/>
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<cpu id='18'/>
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<cpu id='20'/>
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<cpu id='22'/>
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</cpus>
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</cell>
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<cell id='1'>
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<memory unit='KiB'>12582908</memory>
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<cpus num='12'>
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<cpu id='1'/>
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<cpu id='3'/>
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<cpu id='5'/>
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<cpu id='7'/>
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<cpu id='9'/>
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<cpu id='11'/>
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<cpu id='13'/>
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<cpu id='15'/>
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<cpu id='17'/>
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<cpu id='19'/>
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<cpu id='21'/>
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<cpu id='23'/>
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</cpus>
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</cell>
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</cells>
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</topology>
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<secmodel>
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<model>none</model>
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<doi>0</doi>
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</secmodel>
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<secmodel>
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<model>dac</model>
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<doi>0</doi>
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</secmodel>
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</host>
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</capabilities>
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