libvirt/tests/cputestdata/x86-cpuid-Xeon-E5-2650-host.xml
Qiaowei Ren f294b83ee6 cpu_map.xml: add cmt/mbm feature to x86
Some Intel processor families (e.g. the Intel Xeon processor E5 v3
family) introduced some PQos (Platform Qos) features, including CMT
(Cache Monitoring technology) and MBM (Memory Bandwidth Monitoring),
to monitor or control shared resource. This patch add them into x86
part of cpu_map.xml to be used for applications based on libvirt to
get cpu capabilities. For example, Nova in OpenStack schedules guests
based on the CPU features that the host has.

Signed-off-by: Qiaowei Ren <qiaowei.ren@intel.com>
2016-06-25 00:23:58 +02:00

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XML

<cpu>
<arch>x86_64</arch>
<model>Haswell-noTSX</model>
<vendor>Intel</vendor>
<feature name='vme'/>
<feature name='ds'/>
<feature name='acpi'/>
<feature name='ss'/>
<feature name='ht'/>
<feature name='tm'/>
<feature name='pbe'/>
<feature name='dtes64'/>
<feature name='monitor'/>
<feature name='ds_cpl'/>
<feature name='vmx'/>
<feature name='smx'/>
<feature name='est'/>
<feature name='tm2'/>
<feature name='xtpr'/>
<feature name='pdcm'/>
<feature name='dca'/>
<feature name='osxsave'/>
<feature name='f16c'/>
<feature name='rdrand'/>
<feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='cmt'/>
<feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>
<feature name='invtsc'/>
</cpu>