mirror of
https://gitlab.com/libvirt/libvirt.git
synced 2024-08-28 11:31:16 +00:00
CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091 The bit is set when microcode provides the mechanism to invoke a flush of various exploitable CPU buffers by invoking the VERW instruction. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
13 lines
481 B
XML
13 lines
481 B
XML
<cpu mode='custom' match='exact'>
|
|
<model fallback='forbid'>Skylake-Client-IBRS</model>
|
|
<vendor>Intel</vendor>
|
|
<feature policy='require' name='ss'/>
|
|
<feature policy='require' name='hypervisor'/>
|
|
<feature policy='require' name='tsc_adjust'/>
|
|
<feature policy='require' name='clflushopt'/>
|
|
<feature policy='require' name='md-clear'/>
|
|
<feature policy='require' name='stibp'/>
|
|
<feature policy='require' name='ssbd'/>
|
|
<feature policy='require' name='pdpe1gb'/>
|
|
</cpu>
|