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Some Intel processor families (e.g. the Intel Xeon processor E5 v3 family) introduced some RDT (Resource Director Technology) features to monitor or control shared resource. Among these features, MBM (Memory Bandwidth Monitoring), which is build on the CMT (Cache Monitoring Technology) infrastructure, provides OS/VMM a way to monitor bandwidth from one level of cache to another. With current perf framework, this patch adds support to perf event for MBM. Signed-off-by: Qiaowei Ren <qiaowei.ren@intel.com> |
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