mirror of
https://gitlab.com/libvirt/libvirt.git
synced 2024-11-03 20:01:16 +00:00
3f174b6cba
All existing Haswell CPUID data were gathered from CPUs with broken TSX. Let's add new data for Haswell with correct TSX implementation. Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
33 lines
770 B
XML
33 lines
770 B
XML
<cpu>
|
|
<arch>x86_64</arch>
|
|
<model>Haswell</model>
|
|
<vendor>Intel</vendor>
|
|
<feature name='vme'/>
|
|
<feature name='ds'/>
|
|
<feature name='acpi'/>
|
|
<feature name='ss'/>
|
|
<feature name='ht'/>
|
|
<feature name='tm'/>
|
|
<feature name='pbe'/>
|
|
<feature name='dtes64'/>
|
|
<feature name='monitor'/>
|
|
<feature name='ds_cpl'/>
|
|
<feature name='vmx'/>
|
|
<feature name='smx'/>
|
|
<feature name='est'/>
|
|
<feature name='tm2'/>
|
|
<feature name='xtpr'/>
|
|
<feature name='pdcm'/>
|
|
<feature name='dca'/>
|
|
<feature name='osxsave'/>
|
|
<feature name='f16c'/>
|
|
<feature name='rdrand'/>
|
|
<feature name='arat'/>
|
|
<feature name='tsc_adjust'/>
|
|
<feature name='cmt'/>
|
|
<feature name='xsaveopt'/>
|
|
<feature name='pdpe1gb'/>
|
|
<feature name='abm'/>
|
|
<feature name='invtsc'/>
|
|
</cpu>
|