Jiri Denemark 9cd03f7957 cpu_map: Drop pconfig from Icelake-Server CPU model ... The pconfig feature was enabled in QEMU by accident in 3.1.0. All other newer versions do not support it and it was removed from the Icelake-Server CPU model in QEMU. We don't normally change our CPU models even when QEMU does so to avoid breaking migrations between different versions of libvirt. But we can safely do so in this specific case. QEMU never supported enabling pconfig so any domain which was able to start has pconfig disabled. With a small compatibility hack which explicitly disables pconfig when CPU model equals Icelake-Server in migratable domain definition, only one migration scenario stays broken (and there's nothing we can do about it): from any host to a host with libvirt < 5.10.0 and QEMU > 3.1.0. https://bugzilla.redhat.com/show_bug.cgi?id=1749672 Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>		2019-11-12 20:14:16 +01:00
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arm_features.xml	cpu_map: Introduce ARM CPU features	2019-11-07 16:09:16 +01:00
index.xml	cpu_map: Introduce ARM CPU features	2019-11-07 16:09:16 +01:00
Makefile.inc.am	cpu_map: Ship arm_features.xml	2019-11-07 18:09:39 +01:00
ppc64_POWER6.xml
ppc64_POWER7.xml
ppc64_POWER8.xml
ppc64_POWER9.xml
ppc64_POWERPC_e5500.xml
ppc64_POWERPC_e6500.xml
ppc64_vendors.xml
x86_486.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_athlon.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_Broadwell-IBRS.xml	cpu_map: Add more signatures for Broadwell CPU models	2019-03-05 14:47:49 +01:00
x86_Broadwell-noTSX-IBRS.xml	cpu_map: Add more signatures for Broadwell CPU models	2019-03-05 14:47:49 +01:00
x86_Broadwell-noTSX.xml	cpu_map: Add more signatures for Broadwell CPU models	2019-03-05 14:47:49 +01:00
x86_Broadwell.xml	cpu_map: Add more signatures for Broadwell CPU models	2019-03-05 14:47:49 +01:00
x86_Cascadelake-Server.xml	cpu_map: Drop comments about ospke	2019-11-12 20:14:16 +01:00
x86_Conroe.xml	cpu_map: Add more signatures for Conroe CPU model	2019-03-05 14:47:49 +01:00
x86_core2duo.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_coreduo.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_cpu64-rhel5.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_cpu64-rhel6.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_EPYC-IBPB.xml	cpu_map: rename x86_EPYC-IBRS file to x86_EPYC-IBPB	2019-04-09 13:12:51 +02:00
x86_EPYC.xml	cpu_map: Add hex representation of signatures	2019-03-05 14:47:49 +01:00
x86_features.xml	cpu_map: Introduce IA32_ARCH_CAPABILITIES MSR features	2019-06-20 14:02:36 +02:00
x86_Haswell-IBRS.xml	cpu_map: Add more signatures for Haswell CPU models	2019-03-05 14:47:49 +01:00
x86_Haswell-noTSX-IBRS.xml	cpu_map: Add more signatures for Haswell CPU models	2019-03-05 14:47:49 +01:00
x86_Haswell-noTSX.xml	cpu_map: Add more signatures for Haswell CPU models	2019-03-05 14:47:49 +01:00
x86_Haswell.xml	cpu_map: Add more signatures for Haswell CPU models	2019-03-05 14:47:49 +01:00
x86_Icelake-Client.xml	cpu_map: Drop comments about ospke	2019-11-12 20:14:16 +01:00
x86_Icelake-Server.xml	cpu_map: Drop pconfig from Icelake-Server CPU model	2019-11-12 20:14:16 +01:00
x86_IvyBridge-IBRS.xml	cpu_map: Add more signatures for IvyBridge CPU models	2019-03-05 14:47:49 +01:00
x86_IvyBridge.xml	cpu_map: Add more signatures for IvyBridge CPU models	2019-03-05 14:47:49 +01:00
x86_kvm32.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_kvm64.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_n270.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_Nehalem-IBRS.xml	cpu_map: Add more signatures for Nehalem CPU models	2019-03-05 14:47:49 +01:00
x86_Nehalem.xml	cpu_map: Add more signatures for Nehalem CPU models	2019-03-05 14:47:49 +01:00
x86_Opteron_G1.xml	cpu_map: Add hex representation of signatures	2019-03-05 14:47:49 +01:00
x86_Opteron_G2.xml	cpu_map: Add hex representation of signatures	2019-03-05 14:47:49 +01:00
x86_Opteron_G3.xml	cpu_map: Add hex representation of signatures	2019-03-05 14:47:49 +01:00
x86_Opteron_G4.xml	cpu_map: Add hex representation of signatures	2019-03-05 14:47:49 +01:00
x86_Opteron_G5.xml	cpu_map: Add hex representation of signatures	2019-03-05 14:47:49 +01:00
x86_Penryn.xml	cpu_map: Add more signatures for Penryn CPU model	2019-03-05 14:47:49 +01:00
x86_pentium2.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_pentium3.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_pentium.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_pentiumpro.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_phenom.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_qemu32.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_qemu64.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_SandyBridge-IBRS.xml	cpu_map: Add more signatures for SandyBridge CPU models	2019-03-05 14:47:49 +01:00
x86_SandyBridge.xml	cpu_map: Add more signatures for SandyBridge CPU models	2019-03-05 14:47:49 +01:00
x86_Skylake-Client-IBRS.xml	cpu_map: Add more signatures for Skylake-Client CPU models	2019-03-05 14:47:49 +01:00
x86_Skylake-Client.xml	cpu_map: Add more signatures for Skylake-Client CPU models	2019-03-05 14:47:49 +01:00
x86_Skylake-Server-IBRS.xml	cpu_map: Add hex representation of signatures	2019-03-05 14:47:49 +01:00
x86_Skylake-Server.xml	cpu_map: Add hex representation of signatures	2019-03-05 14:47:49 +01:00
x86_vendors.xml	cpu: split x86 map data into separate files	2018-08-28 12:08:21 +01:00
x86_Westmere-IBRS.xml	cpu_map: Add hex representation of signatures	2019-03-05 14:47:49 +01:00
x86_Westmere.xml	cpu_map: Add more signatures for Westmere CPU model	2019-03-05 14:47:49 +01:00