External/libvirt
1
0
Fork 0
mirror of https://gitlab.com/libvirt/libvirt.git synced 2024-12-26 15:45:28 +00:00
Code Issues Packages Projects Releases Wiki Activity
f411b7ef68
libvirt/src/cpu_map
History
Jiri Denemark f411b7ef68 cpu_map: Add TSX_CTRL bit for IA32_ARCH_CAPABILITIES MSR 
CVE-2019-11135

When TSX_CTRL bit of IA32_ARCH_CAPABILITIES MSR is set to 1, the CPU
supports IA32_TSX_CTRL MSR which can be used to disable and/or mask TSX.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-12-13 13:25:27 +01:00
..
arm_features.xml cpu_map: Introduce ARM CPU features 2019-11-07 16:09:16 +01:00
index.xml cpu_map: Introduce ARM CPU features 2019-11-07 16:09:16 +01:00
Makefile.inc.am cpu_map: Ship arm_features.xml 2019-11-07 18:09:39 +01:00
ppc64_POWER6.xml
ppc64_POWER7.xml
ppc64_POWER8.xml
ppc64_POWER9.xml
ppc64_POWERPC_e5500.xml
ppc64_POWERPC_e6500.xml
ppc64_vendors.xml
x86_486.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_athlon.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_Broadwell-IBRS.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_Broadwell-noTSX-IBRS.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_Broadwell-noTSX.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_Broadwell.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_Cascadelake-Server.xml cpu_map: Drop comments about ospke 2019-11-12 20:14:16 +01:00
x86_Conroe.xml cpu_map: Add more signatures for Conroe CPU model 2019-03-05 14:47:49 +01:00
x86_core2duo.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_coreduo.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_cpu64-rhel5.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_cpu64-rhel6.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_EPYC-IBPB.xml cpu_map: rename x86_EPYC-IBRS file to x86_EPYC-IBPB 2019-04-09 13:12:51 +02:00
x86_EPYC.xml cpu_map: Add hex representation of signatures 2019-03-05 14:47:49 +01:00
x86_features.xml cpu_map: Add TSX_CTRL bit for IA32_ARCH_CAPABILITIES MSR 2019-12-13 13:25:27 +01:00
x86_Haswell-IBRS.xml cpu_map: Add more signatures for Haswell CPU models 2019-03-05 14:47:49 +01:00
x86_Haswell-noTSX-IBRS.xml cpu_map: Add more signatures for Haswell CPU models 2019-03-05 14:47:49 +01:00
x86_Haswell-noTSX.xml cpu_map: Add more signatures for Haswell CPU models 2019-03-05 14:47:49 +01:00
x86_Haswell.xml cpu_map: Add more signatures for Haswell CPU models 2019-03-05 14:47:49 +01:00
x86_Icelake-Client.xml cpu_map: Drop comments about ospke 2019-11-12 20:14:16 +01:00
x86_Icelake-Server.xml cpu_map: Drop pconfig from Icelake-Server CPU model 2019-11-12 20:14:16 +01:00
x86_IvyBridge-IBRS.xml cpu_map: Add more signatures for IvyBridge CPU models 2019-03-05 14:47:49 +01:00
x86_IvyBridge.xml cpu_map: Add more signatures for IvyBridge CPU models 2019-03-05 14:47:49 +01:00
x86_kvm32.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_kvm64.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_n270.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_Nehalem-IBRS.xml cpu_map: Add more signatures for Nehalem CPU models 2019-03-05 14:47:49 +01:00
x86_Nehalem.xml cpu_map: Add more signatures for Nehalem CPU models 2019-03-05 14:47:49 +01:00
x86_Opteron_G1.xml cpu_map: Add hex representation of signatures 2019-03-05 14:47:49 +01:00
x86_Opteron_G2.xml cpu_map: Add hex representation of signatures 2019-03-05 14:47:49 +01:00
x86_Opteron_G3.xml cpu_map: Add hex representation of signatures 2019-03-05 14:47:49 +01:00
x86_Opteron_G4.xml cpu_map: Add hex representation of signatures 2019-03-05 14:47:49 +01:00
x86_Opteron_G5.xml cpu_map: Add hex representation of signatures 2019-03-05 14:47:49 +01:00
x86_Penryn.xml cpu_map: Add more signatures for Penryn CPU model 2019-03-05 14:47:49 +01:00
x86_pentium2.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_pentium3.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_pentium.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_pentiumpro.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_phenom.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_qemu32.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_qemu64.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_SandyBridge-IBRS.xml cpu_map: Add more signatures for SandyBridge CPU models 2019-03-05 14:47:49 +01:00
x86_SandyBridge.xml cpu_map: Add more signatures for SandyBridge CPU models 2019-03-05 14:47:49 +01:00
x86_Skylake-Client-IBRS.xml cpu_map: Add more signatures for Skylake-Client CPU models 2019-03-05 14:47:49 +01:00
x86_Skylake-Client.xml cpu_map: Add more signatures for Skylake-Client CPU models 2019-03-05 14:47:49 +01:00
x86_Skylake-Server-IBRS.xml cpu_map: Add hex representation of signatures 2019-03-05 14:47:49 +01:00
x86_Skylake-Server.xml cpu_map: Add hex representation of signatures 2019-03-05 14:47:49 +01:00
x86_vendors.xml cpu: split x86 map data into separate files 2018-08-28 12:08:21 +01:00
x86_Westmere-IBRS.xml cpu_map: Add hex representation of signatures 2019-03-05 14:47:49 +01:00
x86_Westmere.xml cpu_map: Add more signatures for Westmere CPU model 2019-03-05 14:47:49 +01:00