2020-06-05 02:14:17 +00:00
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// Copyright 2020 Arm Limited (or its affiliates). All rights reserved.
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2019-02-25 21:53:01 +00:00
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// Copyright 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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// SPDX-License-Identifier: Apache-2.0
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2020-06-05 02:14:17 +00:00
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//
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// Memory layout of Aarch64 guest:
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//
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// Physical +---------------------------------------------------------------+
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// address | |
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// end | |
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// ~ ~ ~ ~
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// | |
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// | Highmem PCI MMIO space |
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// | |
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// RAM end +---------------------------------------------------------------+
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// (dynamic, | |
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// including | |
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// hotplug ~ ~ ~ ~
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// memory) | |
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// | DRAM |
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// | |
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// 2GB +---------------------------------------------------------------+
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// | |
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// | Reserved |
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// | |
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// 1G+256M +---------------------------------------------------------------+
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// | |
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// | PCI MMCONFIG space |
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// | |
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// 1GB +---------------------------------------------------------------+
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// | |
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// | PCI MMIO space |
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// | |
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// 256 M +---------------------------------------------------------------|
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// | |
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// | Legacy devices space |
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// | |
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// 144 M +---------------------------------------------------------------|
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// | |
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// | Reserverd (now GIC is here) |
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// | |
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// 0GB +---------------------------------------------------------------+
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//
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//
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use vm_memory::{GuestAddress, GuestUsize};
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/// Below this address will reside the GIC, above this address will reside the MMIO devices.
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pub const MAPPED_IO_START: u64 = 0x0900_0000;
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/// Space 0x0900_0000 ~ 0x1000_0000 is reserved for legacy devices.
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pub const LEGACY_SERIAL_MAPPED_IO_START: u64 = 0x0900_0000;
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pub const LEGACY_RTC_MAPPED_IO_START: u64 = 0x0901_0000;
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/// Legacy space will be allocated at once whiling setting up legacy devices.
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pub const LEGACY_DEVICES_MAPPED_IO_SIZE: u64 = 0x0700_0000;
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/// Starting from 0x1000_0000 (256MiB), the 768MiB (ends at 1 GiB) is used for PCIE MMIO
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pub const PCI_DEVICES_MAPPED_IO_START: u64 = 0x1000_0000;
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pub const PCI_DEVICES_MAPPED_IO_SIZE: u64 = 0x3000_0000;
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/// PCI MMCONFIG space (start: after the device space at 1 GiB, length: 256MiB)
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pub const PCI_MMCONFIG_START: GuestAddress = GuestAddress(0x4000_0000);
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pub const PCI_MMCONFIG_SIZE: GuestUsize = 256 << 20;
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/// Start of RAM on 64 bit ARM.
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pub const RAM_64BIT_START: u64 = 0x8000_0000;
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/// Kernel command line maximum size.
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/// As per `arch/arm64/include/uapi/asm/setup.h`.
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pub const CMDLINE_MAX_SIZE: usize = 2048;
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/// Maximum size of the device tree blob as specified in https://www.kernel.org/doc/Documentation/arm64/booting.txt.
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pub const FDT_MAX_SIZE: usize = 0x20_0000;
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// As per virt/kvm/arm/vgic/vgic-kvm-device.c we need
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// the number of interrupts our GIC will support to be:
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// * bigger than 32
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// * less than 1023 and
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// * a multiple of 32.
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// We are setting up our interrupt controller to support a maximum of 128 interrupts.
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/// First usable interrupt on aarch64.
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pub const IRQ_BASE: u32 = 32;
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/// Last usable interrupt on aarch64.
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pub const IRQ_MAX: u32 = 159;
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