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hypervisor: Address Rust 1.51.0 clippy issue (upper_case_acroynms)
warning: name `TranslateGVA` contains a capitalized acronym --> hypervisor/src/arch/emulator/mod.rs:51:5 | 51 | TranslateGVA(#[source] anyhow::Error), | ^^^^^^^^^^^^ help: consider making the acronym lowercase, except the initial letter: `TranslateGva` | = note: `#[warn(clippy::upper_case_acronyms)]` on by default = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#upper_case_acronyms Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
parent
7d5d9bdcf4
commit
0c27f69f1c
@ -48,7 +48,7 @@ pub enum PlatformError {
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SetCpuStateFailure(#[source] anyhow::Error),
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SetCpuStateFailure(#[source] anyhow::Error),
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#[error("Translate virtual address: {0}")]
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#[error("Translate virtual address: {0}")]
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TranslateGVA(#[source] anyhow::Error),
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TranslateVirtualAddress(#[source] anyhow::Error),
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#[error("Unsupported CPU Mode: {0}")]
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#[error("Unsupported CPU Mode: {0}")]
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UnsupportedCpuMode(#[source] anyhow::Error),
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UnsupportedCpuMode(#[source] anyhow::Error),
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@ -4,7 +4,7 @@
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// SPDX-License-Identifier: Apache-2.0
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// SPDX-License-Identifier: Apache-2.0
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//
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//
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#![allow(non_camel_case_types)]
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#![allow(non_camel_case_types, clippy::upper_case_acronyms)]
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//
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//
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// CMP-Compare Two Operands
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// CMP-Compare Two Operands
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@ -229,7 +229,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x38, 0xc4]; // cmp ah,al
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let insn = [0x38, 0xc4]; // cmp ah,al
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let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax)], None);
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let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax)], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
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let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
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@ -243,7 +243,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x83, 0xf8, 0x64]; // cmp eax,100
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let insn = [0x83, 0xf8, 0x64]; // cmp eax,100
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let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax)], None);
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let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax)], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
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let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
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@ -257,7 +257,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x83, 0xf8, 0xff]; // cmp eax,-1
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let insn = [0x83, 0xf8, 0xff]; // cmp eax,-1
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let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax)], None);
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let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax)], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
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let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
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@ -272,7 +272,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x48, 0x39, 0xd8, 0x00, 0xc3]; // cmp rax,rbx + two bytes garbage
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let insn = [0x48, 0x39, 0xd8, 0x00, 0xc3]; // cmp rax,rbx + two bytes garbage
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let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax), (Register::RBX, rbx)], None);
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let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax), (Register::RBX, rbx)], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
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let rflags: u64 = vmm.cpu_state(cpu_id).unwrap().flags() & FLAGS_MASK;
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@ -295,7 +295,7 @@ mod tests {
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let rax = d.0;
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let rax = d.0;
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let rbx = d.1;
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let rbx = d.1;
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let insn = [0x48, 0x39, 0xd8]; // cmp rax,rbx
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let insn = [0x48, 0x39, 0xd8]; // cmp rax,rbx
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let mut vmm = MockVMM::new(
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let mut vmm = MockVmm::new(
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0x1000,
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0x1000,
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vec![(Register::RAX, rax), (Register::RBX, rbx)],
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vec![(Register::RAX, rax), (Register::RBX, rbx)],
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None,
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None,
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@ -323,7 +323,7 @@ mod tests {
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let rax = d.0;
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let rax = d.0;
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let rbx = d.1;
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let rbx = d.1;
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let insn = [0x39, 0xd8]; // cmp eax,ebx
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let insn = [0x39, 0xd8]; // cmp eax,ebx
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let mut vmm = MockVMM::new(
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let mut vmm = MockVmm::new(
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0x1000,
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0x1000,
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vec![(Register::RAX, rax), (Register::RBX, rbx)],
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vec![(Register::RAX, rax), (Register::RBX, rbx)],
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None,
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None,
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@ -254,7 +254,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x48, 0x89, 0xd8];
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let insn = [0x48, 0x89, 0xd8];
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let mut vmm = MockVMM::new(ip, vec![(Register::RBX, rbx)], None);
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let mut vmm = MockVmm::new(ip, vec![(Register::RBX, rbx)], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let rax: u64 = vmm
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let rax: u64 = vmm
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@ -272,7 +272,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x48, 0xb8, 0x44, 0x33, 0x22, 0x11, 0x44, 0x33, 0x22, 0x11];
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let insn = [0x48, 0xb8, 0x44, 0x33, 0x22, 0x11, 0x44, 0x33, 0x22, 0x11];
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let mut vmm = MockVMM::new(ip, vec![], None);
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let mut vmm = MockVmm::new(ip, vec![], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let rax: u64 = vmm
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let rax: u64 = vmm
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@ -292,7 +292,7 @@ mod tests {
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let cpu_id = 0;
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let cpu_id = 0;
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let memory: [u8; 8] = target_rax.to_le_bytes();
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let memory: [u8; 8] = target_rax.to_le_bytes();
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let insn = [0x48, 0x8b, 0x04, 0x00];
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let insn = [0x48, 0x8b, 0x04, 0x00];
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let mut vmm = MockVMM::new(ip, vec![(Register::RAX, rax)], Some((rax + rax, &memory)));
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let mut vmm = MockVmm::new(ip, vec![(Register::RAX, rax)], Some((rax + rax, &memory)));
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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rax = vmm
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rax = vmm
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@ -310,7 +310,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0xb0, 0x11];
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let insn = [0xb0, 0x11];
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let mut vmm = MockVMM::new(ip, vec![], None);
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let mut vmm = MockVmm::new(ip, vec![], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let al = vmm
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let al = vmm
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@ -328,7 +328,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0xb8, 0x11, 0x00, 0x00, 0x00];
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let insn = [0xb8, 0x11, 0x00, 0x00, 0x00];
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let mut vmm = MockVMM::new(ip, vec![], None);
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let mut vmm = MockVmm::new(ip, vec![], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let eax = vmm
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let eax = vmm
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@ -346,7 +346,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x48, 0xc7, 0xc0, 0x44, 0x33, 0x22, 0x11];
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let insn = [0x48, 0xc7, 0xc0, 0x44, 0x33, 0x22, 0x11];
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let mut vmm = MockVMM::new(ip, vec![], None);
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let mut vmm = MockVmm::new(ip, vec![], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let rax: u64 = vmm
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let rax: u64 = vmm
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@ -365,7 +365,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x88, 0x30];
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let insn = [0x88, 0x30];
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let mut vmm = MockVMM::new(
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let mut vmm = MockVmm::new(
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ip,
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ip,
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vec![(Register::RAX, rax), (Register::DH, dh.into())],
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vec![(Register::RAX, rax), (Register::DH, dh.into())],
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None,
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None,
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@ -386,7 +386,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x89, 0x30];
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let insn = [0x89, 0x30];
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let mut vmm = MockVMM::new(
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let mut vmm = MockVmm::new(
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ip,
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ip,
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vec![(Register::RAX, rax), (Register::ESI, esi.into())],
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vec![(Register::RAX, rax), (Register::ESI, esi.into())],
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None,
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None,
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@ -408,7 +408,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x89, 0x3c, 0x05, 0x01, 0x00, 0x00, 0x00];
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let insn = [0x89, 0x3c, 0x05, 0x01, 0x00, 0x00, 0x00];
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let mut vmm = MockVMM::new(
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let mut vmm = MockVmm::new(
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ip,
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ip,
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vec![(Register::RAX, rax), (Register::EDI, edi.into())],
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vec![(Register::RAX, rax), (Register::EDI, edi.into())],
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None,
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None,
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@ -431,7 +431,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x8b, 0x40, 0x10];
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let insn = [0x8b, 0x40, 0x10];
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let mut vmm = MockVMM::new(
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let mut vmm = MockVmm::new(
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ip,
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ip,
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vec![(Register::RAX, rax)],
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vec![(Register::RAX, rax)],
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Some((rax + displacement, &memory)),
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Some((rax + displacement, &memory)),
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@ -456,7 +456,7 @@ mod tests {
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x8a, 0x40, 0x10];
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let insn = [0x8a, 0x40, 0x10];
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let memory: [u8; 1] = al.to_le_bytes();
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let memory: [u8; 1] = al.to_le_bytes();
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let mut vmm = MockVMM::new(
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let mut vmm = MockVmm::new(
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ip,
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ip,
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vec![(Register::RAX, rax)],
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vec![(Register::RAX, rax)],
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Some((rax + displacement, &memory)),
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Some((rax + displacement, &memory)),
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@ -485,7 +485,7 @@ mod tests {
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0x48, 0xc7, 0xc0, 0x00, 0x01, 0x00, 0x00, // mov rax, 0x100
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0x48, 0xc7, 0xc0, 0x00, 0x01, 0x00, 0x00, // mov rax, 0x100
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0x48, 0x8b, 0x58, 0x10, // mov rbx, qword ptr [rax+10h]
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0x48, 0x8b, 0x58, 0x10, // mov rbx, qword ptr [rax+10h]
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];
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];
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let mut vmm = MockVMM::new(ip, vec![], Some((rax + displacement, &memory)));
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let mut vmm = MockVmm::new(ip, vec![], Some((rax + displacement, &memory)));
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assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok());
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assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok());
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let rbx: u64 = vmm
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let rbx: u64 = vmm
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@ -511,7 +511,7 @@ mod tests {
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0x48, 0x8b, 0x58, 0x10, // mov rbx, qword ptr [rax+10h]
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0x48, 0x8b, 0x58, 0x10, // mov rbx, qword ptr [rax+10h]
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];
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];
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let mut vmm = MockVMM::new(ip, vec![], Some((rax + displacement, &memory)));
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let mut vmm = MockVmm::new(ip, vec![], Some((rax + displacement, &memory)));
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// Only run the first instruction.
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// Only run the first instruction.
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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@ -542,7 +542,7 @@ mod tests {
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0x48, 0xc7, 0xc0, 0x00, 0x02, 0x00, 0x00, // mov rax, 0x200
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0x48, 0xc7, 0xc0, 0x00, 0x02, 0x00, 0x00, // mov rax, 0x200
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];
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];
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let mut vmm = MockVMM::new(ip, vec![], Some((rax + displacement, &memory)));
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let mut vmm = MockVmm::new(ip, vec![], Some((rax + displacement, &memory)));
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// Run the 2 first instructions.
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// Run the 2 first instructions.
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assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok());
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assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok());
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@ -571,7 +571,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x0f, 0xb6, 0xc3];
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let insn = [0x0f, 0xb6, 0xc3];
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let mut vmm = MockVMM::new(ip, vec![(Register::BX, bx as u64)], None);
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let mut vmm = MockVmm::new(ip, vec![(Register::BX, bx as u64)], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let eax: u64 = vmm
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let eax: u64 = vmm
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@ -589,7 +589,7 @@ mod tests {
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let ip: u64 = 0x1000;
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let ip: u64 = 0x1000;
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x0f, 0xb6, 0xc7];
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let insn = [0x0f, 0xb6, 0xc7];
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let mut vmm = MockVMM::new(ip, vec![(Register::BX, bx as u64)], None);
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let mut vmm = MockVmm::new(ip, vec![(Register::BX, bx as u64)], None);
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let eax: u64 = vmm
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let eax: u64 = vmm
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@ -609,7 +609,7 @@ mod tests {
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let cpu_id = 0;
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let cpu_id = 0;
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let insn = [0x0f, 0xb7, 0x03];
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let insn = [0x0f, 0xb7, 0x03];
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let memory: [u8; 1] = value.to_le_bytes();
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let memory: [u8; 1] = value.to_le_bytes();
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let mut vmm = MockVMM::new(ip, vec![(Register::RBX, rbx)], Some((rbx, &memory)));
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let mut vmm = MockVmm::new(ip, vec![(Register::RBX, rbx)], Some((rbx, &memory)));
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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assert!(vmm.emulate_first_insn(cpu_id, &insn).is_ok());
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let eax: u64 = vmm
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let eax: u64 = vmm
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@ -107,7 +107,7 @@ mod tests {
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let regs = vec![(Register::ECX, 3), (Register::ESI, 0), (Register::EDI, 0xc)];
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let regs = vec![(Register::ECX, 3), (Register::ESI, 0), (Register::EDI, 0xc)];
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let mut data = [0u8; 4];
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let mut data = [0u8; 4];
|
||||||
|
|
||||||
let mut vmm = MockVMM::new(ip, regs, Some((0, &memory)));
|
let mut vmm = MockVmm::new(ip, regs, Some((0, &memory)));
|
||||||
|
|
||||||
assert!(vmm.emulate_first_insn(0, &insn).is_ok());
|
assert!(vmm.emulate_first_insn(0, &insn).is_ok());
|
||||||
|
|
||||||
@ -117,7 +117,7 @@ mod tests {
|
|||||||
assert_eq!(0xaabbccdd, <u32>::from_le_bytes(data));
|
assert_eq!(0xaabbccdd, <u32>::from_le_bytes(data));
|
||||||
vmm.read_memory(0xc + 8, &mut data).unwrap();
|
vmm.read_memory(0xc + 8, &mut data).unwrap();
|
||||||
assert_eq!(0x5aa55aa5, <u32>::from_le_bytes(data));
|
assert_eq!(0x5aa55aa5, <u32>::from_le_bytes(data));
|
||||||
// The rest should be default value 0 from MockVMM
|
// The rest should be default value 0 from MockVmm
|
||||||
vmm.read_memory(0xc + 12, &mut data).unwrap();
|
vmm.read_memory(0xc + 12, &mut data).unwrap();
|
||||||
assert_eq!(0x0, <u32>::from_le_bytes(data));
|
assert_eq!(0x0, <u32>::from_le_bytes(data));
|
||||||
}
|
}
|
||||||
@ -132,13 +132,13 @@ mod tests {
|
|||||||
let regs = vec![(Register::ESI, 0), (Register::EDI, 0x8)];
|
let regs = vec![(Register::ESI, 0), (Register::EDI, 0x8)];
|
||||||
let mut data = [0u8; 4];
|
let mut data = [0u8; 4];
|
||||||
|
|
||||||
let mut vmm = MockVMM::new(ip, regs, Some((0, &memory)));
|
let mut vmm = MockVmm::new(ip, regs, Some((0, &memory)));
|
||||||
|
|
||||||
assert!(vmm.emulate_first_insn(0, &insn).is_ok());
|
assert!(vmm.emulate_first_insn(0, &insn).is_ok());
|
||||||
|
|
||||||
vmm.read_memory(0x8, &mut data).unwrap();
|
vmm.read_memory(0x8, &mut data).unwrap();
|
||||||
assert_eq!(0x12345678, <u32>::from_le_bytes(data));
|
assert_eq!(0x12345678, <u32>::from_le_bytes(data));
|
||||||
// The rest should be default value 0 from MockVMM
|
// The rest should be default value 0 from MockVmm
|
||||||
vmm.read_memory(0x4, &mut data).unwrap();
|
vmm.read_memory(0x4, &mut data).unwrap();
|
||||||
assert_eq!(0x0, <u32>::from_le_bytes(data));
|
assert_eq!(0x0, <u32>::from_le_bytes(data));
|
||||||
vmm.read_memory(0x8 + 8, &mut data).unwrap();
|
vmm.read_memory(0x8 + 8, &mut data).unwrap();
|
||||||
|
@ -650,17 +650,17 @@ mod mock_vmm {
|
|||||||
use std::sync::{Arc, Mutex};
|
use std::sync::{Arc, Mutex};
|
||||||
|
|
||||||
#[derive(Debug, Clone)]
|
#[derive(Debug, Clone)]
|
||||||
pub struct MockVMM {
|
pub struct MockVmm {
|
||||||
memory: Vec<u8>,
|
memory: Vec<u8>,
|
||||||
state: Arc<Mutex<CpuState>>,
|
state: Arc<Mutex<CpuState>>,
|
||||||
}
|
}
|
||||||
|
|
||||||
unsafe impl Sync for MockVMM {}
|
unsafe impl Sync for MockVmm {}
|
||||||
|
|
||||||
pub type MockResult = Result<(), EmulationError<Exception>>;
|
pub type MockResult = Result<(), EmulationError<Exception>>;
|
||||||
|
|
||||||
impl MockVMM {
|
impl MockVmm {
|
||||||
pub fn new(ip: u64, regs: Vec<(Register, u64)>, memory: Option<(u64, &[u8])>) -> MockVMM {
|
pub fn new(ip: u64, regs: Vec<(Register, u64)>, memory: Option<(u64, &[u8])>) -> MockVmm {
|
||||||
let _ = env_logger::try_init();
|
let _ = env_logger::try_init();
|
||||||
let cs_reg = segment_from_gdt(gdt_entry(0xc09b, 0, 0xffffffff), 1);
|
let cs_reg = segment_from_gdt(gdt_entry(0xc09b, 0, 0xffffffff), 1);
|
||||||
let ds_reg = segment_from_gdt(gdt_entry(0xc093, 0, 0xffffffff), 2);
|
let ds_reg = segment_from_gdt(gdt_entry(0xc093, 0, 0xffffffff), 2);
|
||||||
@ -674,7 +674,7 @@ mod mock_vmm {
|
|||||||
initial_state.write_reg(reg, value).unwrap();
|
initial_state.write_reg(reg, value).unwrap();
|
||||||
}
|
}
|
||||||
|
|
||||||
let mut vmm = MockVMM {
|
let mut vmm = MockVmm {
|
||||||
memory: vec![0; 8192],
|
memory: vec![0; 8192],
|
||||||
state: Arc::new(Mutex::new(initial_state)),
|
state: Arc::new(Mutex::new(initial_state)),
|
||||||
};
|
};
|
||||||
@ -710,7 +710,7 @@ mod mock_vmm {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl PlatformEmulator for MockVMM {
|
impl PlatformEmulator for MockVmm {
|
||||||
type CpuState = CpuState;
|
type CpuState = CpuState;
|
||||||
|
|
||||||
fn read_memory(&self, gva: u64, data: &mut [u8]) -> Result<(), PlatformError> {
|
fn read_memory(&self, gva: u64, data: &mut [u8]) -> Result<(), PlatformError> {
|
||||||
@ -792,7 +792,7 @@ mod tests {
|
|||||||
0x48, 0xc7, 0xc0, 0x00, // mov rax, 0x1000 -- Missing bytes: 0x00, 0x10, 0x00, 0x00,
|
0x48, 0xc7, 0xc0, 0x00, // mov rax, 0x1000 -- Missing bytes: 0x00, 0x10, 0x00, 0x00,
|
||||||
];
|
];
|
||||||
|
|
||||||
let mut vmm = MockVMM::new(ip, vec![], Some((ip, &memory)));
|
let mut vmm = MockVmm::new(ip, vec![], Some((ip, &memory)));
|
||||||
assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok());
|
assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok());
|
||||||
|
|
||||||
let rax: u64 = vmm
|
let rax: u64 = vmm
|
||||||
@ -827,7 +827,7 @@ mod tests {
|
|||||||
0x48, 0x8b, // Truncated mov rbx, qword ptr [rax+10h] -- missing [0x58, 0x10]
|
0x48, 0x8b, // Truncated mov rbx, qword ptr [rax+10h] -- missing [0x58, 0x10]
|
||||||
];
|
];
|
||||||
|
|
||||||
let mut vmm = MockVMM::new(ip, vec![], Some((ip, &memory)));
|
let mut vmm = MockVmm::new(ip, vec![], Some((ip, &memory)));
|
||||||
assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok());
|
assert!(vmm.emulate_insn(cpu_id, &insn, Some(2)).is_ok());
|
||||||
|
|
||||||
let rbx: u64 = vmm
|
let rbx: u64 = vmm
|
||||||
@ -857,7 +857,7 @@ mod tests {
|
|||||||
0x48, 0xc7, 0xc0, 0x00, // mov rax, 0x1000 -- Missing bytes: 0x00, 0x10, 0x00, 0x00,
|
0x48, 0xc7, 0xc0, 0x00, // mov rax, 0x1000 -- Missing bytes: 0x00, 0x10, 0x00, 0x00,
|
||||||
];
|
];
|
||||||
|
|
||||||
let mut vmm = MockVMM::new(ip, vec![], Some((ip, &memory)));
|
let mut vmm = MockVmm::new(ip, vec![], Some((ip, &memory)));
|
||||||
assert!(vmm.emulate_first_insn(cpu_id, &insn).is_err());
|
assert!(vmm.emulate_first_insn(cpu_id, &insn).is_err());
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -27,7 +27,7 @@ pub const MTRR_MEM_TYPE_WB: u64 = 0x6;
|
|||||||
pub const NUM_IOAPIC_PINS: usize = 24;
|
pub const NUM_IOAPIC_PINS: usize = 24;
|
||||||
|
|
||||||
// X86 Exceptions
|
// X86 Exceptions
|
||||||
#[allow(dead_code)]
|
#[allow(dead_code, clippy::upper_case_acronyms)]
|
||||||
#[derive(Clone, Debug)]
|
#[derive(Clone, Debug)]
|
||||||
pub enum Exception {
|
pub enum Exception {
|
||||||
DE = 0, // Divide Error
|
DE = 0, // Divide Error
|
||||||
|
@ -174,7 +174,7 @@ pub enum HypervisorCpuError {
|
|||||||
/// Enabling HyperV SynIC error
|
/// Enabling HyperV SynIC error
|
||||||
///
|
///
|
||||||
#[error("Failed to enable HyperV SynIC")]
|
#[error("Failed to enable HyperV SynIC")]
|
||||||
EnableHyperVSynIC(#[source] anyhow::Error),
|
EnableHyperVSyncIc(#[source] anyhow::Error),
|
||||||
///
|
///
|
||||||
/// Getting AArch64 core register error
|
/// Getting AArch64 core register error
|
||||||
///
|
///
|
||||||
@ -204,7 +204,7 @@ pub enum HypervisorCpuError {
|
|||||||
/// GVA translation error
|
/// GVA translation error
|
||||||
///
|
///
|
||||||
#[error("Failed to translate GVA: {0}")]
|
#[error("Failed to translate GVA: {0}")]
|
||||||
TranslateGVA(#[source] anyhow::Error),
|
TranslateVirtualAddress(#[source] anyhow::Error),
|
||||||
///
|
///
|
||||||
/// Failed to initialize TDX on CPU
|
/// Failed to initialize TDX on CPU
|
||||||
///
|
///
|
||||||
|
@ -709,7 +709,7 @@ impl cpu::Vcpu for KvmVcpu {
|
|||||||
};
|
};
|
||||||
self.fd
|
self.fd
|
||||||
.enable_cap(&cap)
|
.enable_cap(&cap)
|
||||||
.map_err(|e| cpu::HypervisorCpuError::EnableHyperVSynIC(e.into()))
|
.map_err(|e| cpu::HypervisorCpuError::EnableHyperVSyncIc(e.into()))
|
||||||
}
|
}
|
||||||
///
|
///
|
||||||
/// X86 specific call to retrieve the CPUID registers.
|
/// X86 specific call to retrieve the CPUID registers.
|
||||||
|
@ -530,7 +530,7 @@ impl cpu::Vcpu for MshvVcpu {
|
|||||||
let r = self
|
let r = self
|
||||||
.fd
|
.fd
|
||||||
.translate_gva(gva, flags)
|
.translate_gva(gva, flags)
|
||||||
.map_err(|e| cpu::HypervisorCpuError::TranslateGVA(e.into()))?;
|
.map_err(|e| cpu::HypervisorCpuError::TranslateVirtualAddress(e.into()))?;
|
||||||
|
|
||||||
Ok(r)
|
Ok(r)
|
||||||
}
|
}
|
||||||
@ -555,12 +555,12 @@ impl<'a> MshvEmulatorContext<'a> {
|
|||||||
let r = self
|
let r = self
|
||||||
.vcpu
|
.vcpu
|
||||||
.translate_gva(gva, flags.into())
|
.translate_gva(gva, flags.into())
|
||||||
.map_err(|e| PlatformError::TranslateGVA(anyhow!(e)))?;
|
.map_err(|e| PlatformError::TranslateVirtualAddress(anyhow!(e)))?;
|
||||||
|
|
||||||
let result_code = unsafe { r.1.__bindgen_anon_1.result_code };
|
let result_code = unsafe { r.1.__bindgen_anon_1.result_code };
|
||||||
match result_code {
|
match result_code {
|
||||||
hv_translate_gva_result_code_HvTranslateGvaSuccess => Ok(r.0),
|
hv_translate_gva_result_code_HvTranslateGvaSuccess => Ok(r.0),
|
||||||
_ => Err(PlatformError::TranslateGVA(anyhow!(result_code))),
|
_ => Err(PlatformError::TranslateVirtualAddress(anyhow!(result_code))),
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user