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pci: Remove manual range checks
error: manual `Range::contains` implementation --> pci/src/vfio.rs:948:12 | 948 | if (reg_idx >= PCI_CONFIG_BAR0_INDEX && reg_idx < PCI_CONFIG_BAR0_INDEX + BAR_NUMS) | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: use: `(PCI_CONFIG_BAR0_INDEX..PCI_CONFIG_BAR0_INDEX + BAR_NUMS).contains(®_idx)` | = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#manual_range_contains Signed-off-by: Rob Bradford <robert.bradford@intel.com>
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@ -481,7 +481,7 @@ impl PciConfiguration {
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pub fn write_reg(&mut self, reg_idx: usize, value: u32) {
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pub fn write_reg(&mut self, reg_idx: usize, value: u32) {
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let mut mask = self.writable_bits[reg_idx];
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let mut mask = self.writable_bits[reg_idx];
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if reg_idx >= BAR0_REG && reg_idx < BAR0_REG + NUM_BAR_REGS {
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if (BAR0_REG..BAR0_REG + NUM_BAR_REGS).contains(®_idx) {
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// Handle very specific case where the BAR is being written with
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// Handle very specific case where the BAR is being written with
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// all 1's to retrieve the BAR size during next BAR reading.
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// all 1's to retrieve the BAR size during next BAR reading.
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if value == 0xffff_ffff {
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if value == 0xffff_ffff {
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@ -768,7 +768,7 @@ impl PciConfiguration {
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let value = LittleEndian::read_u32(data);
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let value = LittleEndian::read_u32(data);
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let mask = self.writable_bits[reg_idx];
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let mask = self.writable_bits[reg_idx];
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if reg_idx >= BAR0_REG && reg_idx < BAR0_REG + NUM_BAR_REGS {
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if (BAR0_REG..BAR0_REG + NUM_BAR_REGS).contains(®_idx) {
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let bar_idx = reg_idx - 4;
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let bar_idx = reg_idx - 4;
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if (value & mask) != (self.bars[bar_idx].addr & mask) {
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if (value & mask) != (self.bars[bar_idx].addr & mask) {
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// Handle special case where the address being written is
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// Handle special case where the address being written is
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@ -892,7 +892,7 @@ impl PciDevice for VfioPciDevice {
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// When the guest wants to write to a BAR, we trap it into
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// When the guest wants to write to a BAR, we trap it into
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// our local configuration space. We're not reprogramming
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// our local configuration space. We're not reprogramming
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// VFIO device.
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// VFIO device.
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if (reg_idx >= PCI_CONFIG_BAR0_INDEX && reg_idx < PCI_CONFIG_BAR0_INDEX + BAR_NUMS)
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if (PCI_CONFIG_BAR0_INDEX..PCI_CONFIG_BAR0_INDEX + BAR_NUMS).contains(®_idx)
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|| reg_idx == PCI_ROM_EXP_BAR_INDEX
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|| reg_idx == PCI_ROM_EXP_BAR_INDEX
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{
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{
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// We keep our local cache updated with the BARs.
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// We keep our local cache updated with the BARs.
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@ -945,7 +945,7 @@ impl PciDevice for VfioPciDevice {
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// from our local configuration space. We want the guest to
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// from our local configuration space. We want the guest to
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// use that and not the VFIO device BARs as it does not map
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// use that and not the VFIO device BARs as it does not map
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// with the guest address space.
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// with the guest address space.
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if (reg_idx >= PCI_CONFIG_BAR0_INDEX && reg_idx < PCI_CONFIG_BAR0_INDEX + BAR_NUMS)
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if (PCI_CONFIG_BAR0_INDEX..PCI_CONFIG_BAR0_INDEX + BAR_NUMS).contains(®_idx)
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|| reg_idx == PCI_ROM_EXP_BAR_INDEX
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|| reg_idx == PCI_ROM_EXP_BAR_INDEX
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{
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{
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return self.configuration.read_reg(reg_idx);
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return self.configuration.read_reg(reg_idx);
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