mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-11-04 19:11:11 +00:00
vmm: Port DeviceManager to Aml::append_aml_bytes()
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
parent
185f0c1bf3
commit
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@ -3889,12 +3889,10 @@ fn numa_node_id_from_memory_zone_id(numa_nodes: &NumaNodes, memory_zone_id: &str
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#[cfg(feature = "acpi")]
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impl Aml for DeviceManager {
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fn to_aml_bytes(&self) -> Vec<u8> {
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fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
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#[cfg(target_arch = "aarch64")]
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use arch::aarch64::DeviceInfoForFdt;
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let mut bytes = Vec::new();
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let mut pci_scan_methods = Vec::new();
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for i in 0..self.pci_segments.len() {
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pci_scan_methods.push(aml::MethodCall::new(
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@ -3908,65 +3906,67 @@ impl Aml for DeviceManager {
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}
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// PCI hotplug controller
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bytes.extend_from_slice(
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&aml::Device::new(
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"_SB_.PHPR".into(),
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vec![
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&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
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&aml::Name::new("_STA".into(), &0x0bu8),
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&aml::Name::new("_UID".into(), &"PCI Hotplug Controller"),
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&aml::Mutex::new("BLCK".into(), 0),
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&aml::Name::new(
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"_CRS".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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true,
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self.acpi_address.0 as u64,
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self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,
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)]),
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),
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// OpRegion and Fields map MMIO range into individual field values
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&aml::OpRegion::new(
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"PCST".into(),
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aml::OpRegionSpace::SystemMemory,
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self.acpi_address.0 as usize,
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DEVICE_MANAGER_ACPI_SIZE,
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),
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&aml::Field::new(
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"PCST".into(),
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aml::FieldAccessType::DWord,
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aml::FieldUpdateRule::WriteAsZeroes,
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vec![
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aml::FieldEntry::Named(*b"PCIU", 32),
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aml::FieldEntry::Named(*b"PCID", 32),
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aml::FieldEntry::Named(*b"B0EJ", 32),
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aml::FieldEntry::Named(*b"PSEG", 32),
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],
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),
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&aml::Method::new(
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"PCEJ".into(),
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2,
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aml::Device::new(
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"_SB_.PHPR".into(),
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vec![
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&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
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&aml::Name::new("_STA".into(), &0x0bu8),
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&aml::Name::new("_UID".into(), &"PCI Hotplug Controller"),
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&aml::Mutex::new("BLCK".into(), 0),
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&aml::Name::new(
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"_CRS".into(),
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&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
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aml::AddressSpaceCachable::NotCacheable,
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true,
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vec![
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// Take lock defined above
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&aml::Acquire::new("BLCK".into(), 0xffff),
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// Choose the current segment
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&aml::Store::new(&aml::Path::new("PSEG"), &aml::Arg(1)),
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// Write PCI bus number (in first argument) to I/O port via field
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&aml::ShiftLeft::new(&aml::Path::new("B0EJ"), &aml::ONE, &aml::Arg(0)),
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// Release lock
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&aml::Release::new("BLCK".into()),
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// Return 0
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&aml::Return::new(&aml::ZERO),
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],
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),
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&aml::Method::new("PSCN".into(), 0, true, pci_scan_inner),
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],
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)
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.to_aml_bytes(),
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);
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self.acpi_address.0 as u64,
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self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,
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)]),
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),
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// OpRegion and Fields map MMIO range into individual field values
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&aml::OpRegion::new(
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"PCST".into(),
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aml::OpRegionSpace::SystemMemory,
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self.acpi_address.0 as usize,
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DEVICE_MANAGER_ACPI_SIZE,
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),
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&aml::Field::new(
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"PCST".into(),
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aml::FieldAccessType::DWord,
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aml::FieldUpdateRule::WriteAsZeroes,
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vec![
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aml::FieldEntry::Named(*b"PCIU", 32),
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aml::FieldEntry::Named(*b"PCID", 32),
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aml::FieldEntry::Named(*b"B0EJ", 32),
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aml::FieldEntry::Named(*b"PSEG", 32),
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],
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),
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&aml::Method::new(
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"PCEJ".into(),
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2,
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true,
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vec![
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// Take lock defined above
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&aml::Acquire::new("BLCK".into(), 0xffff),
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// Choose the current segment
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&aml::Store::new(&aml::Path::new("PSEG"), &aml::Arg(1)),
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// Write PCI bus number (in first argument) to I/O port via field
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&aml::ShiftLeft::new(&aml::Path::new("B0EJ"), &aml::ONE, &aml::Arg(0)),
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// Release lock
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&aml::Release::new("BLCK".into()),
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// Return 0
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&aml::Return::new(&aml::ZERO),
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],
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),
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&aml::Method::new("PSCN".into(), 0, true, pci_scan_inner),
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],
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)
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.append_aml_bytes(bytes);
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let mbrd_dsdt_data = aml::Device::new(
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for segment in &self.pci_segments {
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segment.append_aml_bytes(bytes);
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}
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aml::Device::new(
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"_SB_.MBRD".into(),
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vec![
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&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C02")),
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@ -3981,7 +3981,7 @@ impl Aml for DeviceManager {
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),
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],
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)
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.to_aml_bytes();
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.append_aml_bytes(bytes);
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// Serial device
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#[cfg(target_arch = "x86_64")]
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@ -3998,68 +3998,54 @@ impl Aml for DeviceManager {
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// If serial is turned off, add a fake device with invalid irq.
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31
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};
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let com1_dsdt_data = aml::Device::new(
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"_SB_.COM1".into(),
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vec![
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&aml::Name::new(
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"_HID".into(),
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#[cfg(target_arch = "x86_64")]
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&aml::EisaName::new("PNP0501"),
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#[cfg(target_arch = "aarch64")]
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&"ARMH0011",
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),
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&aml::Name::new("_UID".into(), &aml::ZERO),
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&aml::Name::new(
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"_CRS".into(),
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&aml::ResourceTemplate::new(vec![
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&aml::Interrupt::new(true, true, false, false, serial_irq),
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if self.config.lock().unwrap().serial.mode != ConsoleOutputMode::Off {
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aml::Device::new(
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"_SB_.COM1".into(),
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vec![
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&aml::Name::new(
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"_HID".into(),
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#[cfg(target_arch = "x86_64")]
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&aml::Io::new(0x3f8, 0x3f8, 0, 0x8),
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&aml::EisaName::new("PNP0501"),
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#[cfg(target_arch = "aarch64")]
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&aml::Memory32Fixed::new(
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true,
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arch::layout::LEGACY_SERIAL_MAPPED_IO_START as u32,
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MMIO_LEN as u32,
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),
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]),
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),
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],
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)
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.to_aml_bytes();
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&"ARMH0011",
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),
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&aml::Name::new("_UID".into(), &aml::ZERO),
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&aml::Name::new(
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"_CRS".into(),
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&aml::ResourceTemplate::new(vec![
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&aml::Interrupt::new(true, true, false, false, serial_irq),
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#[cfg(target_arch = "x86_64")]
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&aml::Io::new(0x3f8, 0x3f8, 0, 0x8),
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#[cfg(target_arch = "aarch64")]
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&aml::Memory32Fixed::new(
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true,
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arch::layout::LEGACY_SERIAL_MAPPED_IO_START as u32,
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MMIO_LEN as u32,
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),
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]),
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),
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],
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)
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.append_aml_bytes(bytes);
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}
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let s5_sleep_data =
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aml::Name::new("_S5_".into(), &aml::Package::new(vec![&5u8])).to_aml_bytes();
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aml::Name::new("_S5_".into(), &aml::Package::new(vec![&5u8])).append_aml_bytes(bytes);
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let power_button_dsdt_data = aml::Device::new(
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aml::Device::new(
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"_SB_.PWRB".into(),
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vec![
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&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C0C")),
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&aml::Name::new("_UID".into(), &aml::ZERO),
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],
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)
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.to_aml_bytes();
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.append_aml_bytes(bytes);
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let ged_data = self
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.ged_notification_device
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self.ged_notification_device
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.as_ref()
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.unwrap()
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.lock()
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.unwrap()
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.to_aml_bytes();
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for segment in &self.pci_segments {
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let pci_dsdt_data = segment.to_aml_bytes();
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bytes.extend_from_slice(pci_dsdt_data.as_slice());
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}
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bytes.extend_from_slice(mbrd_dsdt_data.as_slice());
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if self.config.lock().unwrap().serial.mode != ConsoleOutputMode::Off {
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bytes.extend_from_slice(com1_dsdt_data.as_slice());
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}
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bytes.extend_from_slice(s5_sleep_data.as_slice());
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bytes.extend_from_slice(power_button_dsdt_data.as_slice());
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bytes.extend_from_slice(ged_data.as_slice());
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bytes
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.append_aml_bytes(bytes);
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}
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}
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