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vmm: Port DeviceManager to Aml::append_aml_bytes()

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Signed-off-by: Rob Bradford <robert.bradford@intel.com>
This commit is contained in:
Rob Bradford 2021-11-04 17:12:59 +00:00
parent 185f0c1bf3
commit d96d98d88e
1 changed files with 94 additions and 108 deletions
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202
vmm/src/device_manager.rs
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@ -3889,12 +3889,10 @@ fn numa_node_id_from_memory_zone_id(numa_nodes: &NumaNodes, memory_zone_id: &str
#[cfg(feature = "acpi")] #[cfg(feature = "acpi")]
impl Aml for DeviceManager { impl Aml for DeviceManager {
fn to_aml_bytes(&self) -> Vec<u8> { fn append_aml_bytes(&self, bytes: &mut Vec<u8>) {
#[cfg(target_arch = "aarch64")] #[cfg(target_arch = "aarch64")]
use arch::aarch64::DeviceInfoForFdt; use arch::aarch64::DeviceInfoForFdt;
let mut bytes = Vec::new();
let mut pci_scan_methods = Vec::new(); let mut pci_scan_methods = Vec::new();
for i in 0..self.pci_segments.len() { for i in 0..self.pci_segments.len() {
pci_scan_methods.push(aml::MethodCall::new( pci_scan_methods.push(aml::MethodCall::new(
@ -3908,65 +3906,67 @@ impl Aml for DeviceManager {
} }
// PCI hotplug controller // PCI hotplug controller
bytes.extend_from_slice( aml::Device::new(
&aml::Device::new( "_SB_.PHPR".into(),
"_SB_.PHPR".into(), vec![
vec![ &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")),
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0A06")), &aml::Name::new("_STA".into(), &0x0bu8),
&aml::Name::new("_STA".into(), &0x0bu8), &aml::Name::new("_UID".into(), &"PCI Hotplug Controller"),
&aml::Name::new("_UID".into(), &"PCI Hotplug Controller"), &aml::Mutex::new("BLCK".into(), 0),
&aml::Mutex::new("BLCK".into(), 0), &aml::Name::new(
&aml::Name::new( "_CRS".into(),
"_CRS".into(), &aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory(
&aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory( aml::AddressSpaceCachable::NotCacheable,
aml::AddressSpaceCachable::NotCacheable,
true,
self.acpi_address.0 as u64,
self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,
)]),
),
// OpRegion and Fields map MMIO range into individual field values
&aml::OpRegion::new(
"PCST".into(),
aml::OpRegionSpace::SystemMemory,
self.acpi_address.0 as usize,
DEVICE_MANAGER_ACPI_SIZE,
),
&aml::Field::new(
"PCST".into(),
aml::FieldAccessType::DWord,
aml::FieldUpdateRule::WriteAsZeroes,
vec![
aml::FieldEntry::Named(*b"PCIU", 32),
aml::FieldEntry::Named(*b"PCID", 32),
aml::FieldEntry::Named(*b"B0EJ", 32),
aml::FieldEntry::Named(*b"PSEG", 32),
],
),
&aml::Method::new(
"PCEJ".into(),
2,
true, true,
vec![ self.acpi_address.0 as u64,
// Take lock defined above self.acpi_address.0 + DEVICE_MANAGER_ACPI_SIZE as u64 - 1,
&aml::Acquire::new("BLCK".into(), 0xffff), )]),
// Choose the current segment ),
&aml::Store::new(&aml::Path::new("PSEG"), &aml::Arg(1)), // OpRegion and Fields map MMIO range into individual field values
// Write PCI bus number (in first argument) to I/O port via field &aml::OpRegion::new(
&aml::ShiftLeft::new(&aml::Path::new("B0EJ"), &aml::ONE, &aml::Arg(0)), "PCST".into(),
// Release lock aml::OpRegionSpace::SystemMemory,
&aml::Release::new("BLCK".into()), self.acpi_address.0 as usize,
// Return 0 DEVICE_MANAGER_ACPI_SIZE,
&aml::Return::new(&aml::ZERO), ),
], &aml::Field::new(
), "PCST".into(),
&aml::Method::new("PSCN".into(), 0, true, pci_scan_inner), aml::FieldAccessType::DWord,
], aml::FieldUpdateRule::WriteAsZeroes,
) vec![
.to_aml_bytes(), aml::FieldEntry::Named(*b"PCIU", 32),
); aml::FieldEntry::Named(*b"PCID", 32),
aml::FieldEntry::Named(*b"B0EJ", 32),
aml::FieldEntry::Named(*b"PSEG", 32),
],
),
&aml::Method::new(
"PCEJ".into(),
2,
true,
vec![
// Take lock defined above
&aml::Acquire::new("BLCK".into(), 0xffff),
// Choose the current segment
&aml::Store::new(&aml::Path::new("PSEG"), &aml::Arg(1)),
// Write PCI bus number (in first argument) to I/O port via field
&aml::ShiftLeft::new(&aml::Path::new("B0EJ"), &aml::ONE, &aml::Arg(0)),
// Release lock
&aml::Release::new("BLCK".into()),
// Return 0
&aml::Return::new(&aml::ZERO),
],
),
&aml::Method::new("PSCN".into(), 0, true, pci_scan_inner),
],
)
.append_aml_bytes(bytes);
let mbrd_dsdt_data = aml::Device::new( for segment in &self.pci_segments {
segment.append_aml_bytes(bytes);
}
aml::Device::new(
"_SB_.MBRD".into(), "_SB_.MBRD".into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C02")), &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C02")),
@ -3981,7 +3981,7 @@ impl Aml for DeviceManager {
), ),
], ],
) )
.to_aml_bytes(); .append_aml_bytes(bytes);
// Serial device // Serial device
#[cfg(target_arch = "x86_64")] #[cfg(target_arch = "x86_64")]
@ -3998,68 +3998,54 @@ impl Aml for DeviceManager {
// If serial is turned off, add a fake device with invalid irq. // If serial is turned off, add a fake device with invalid irq.
31 31
}; };
let com1_dsdt_data = aml::Device::new( if self.config.lock().unwrap().serial.mode != ConsoleOutputMode::Off {
"_SB_.COM1".into(), aml::Device::new(
vec![ "_SB_.COM1".into(),
&aml::Name::new( vec![
"_HID".into(), &aml::Name::new(
#[cfg(target_arch = "x86_64")] "_HID".into(),
&aml::EisaName::new("PNP0501"),
#[cfg(target_arch = "aarch64")]
&"ARMH0011",
),
&aml::Name::new("_UID".into(), &aml::ZERO),
&aml::Name::new(
"_CRS".into(),
&aml::ResourceTemplate::new(vec![
&aml::Interrupt::new(true, true, false, false, serial_irq),
#[cfg(target_arch = "x86_64")] #[cfg(target_arch = "x86_64")]
&aml::Io::new(0x3f8, 0x3f8, 0, 0x8), &aml::EisaName::new("PNP0501"),
#[cfg(target_arch = "aarch64")] #[cfg(target_arch = "aarch64")]
&aml::Memory32Fixed::new( &"ARMH0011",
true, ),
arch::layout::LEGACY_SERIAL_MAPPED_IO_START as u32, &aml::Name::new("_UID".into(), &aml::ZERO),
MMIO_LEN as u32, &aml::Name::new(
), "_CRS".into(),
]), &aml::ResourceTemplate::new(vec![
), &aml::Interrupt::new(true, true, false, false, serial_irq),
], #[cfg(target_arch = "x86_64")]
) &aml::Io::new(0x3f8, 0x3f8, 0, 0x8),
.to_aml_bytes(); #[cfg(target_arch = "aarch64")]
&aml::Memory32Fixed::new(
true,
arch::layout::LEGACY_SERIAL_MAPPED_IO_START as u32,
MMIO_LEN as u32,
),
]),
),
],
)
.append_aml_bytes(bytes);
}
let s5_sleep_data = aml::Name::new("_S5_".into(), &aml::Package::new(vec![&5u8])).append_aml_bytes(bytes);
aml::Name::new("_S5_".into(), &aml::Package::new(vec![&5u8])).to_aml_bytes();
let power_button_dsdt_data = aml::Device::new( aml::Device::new(
"_SB_.PWRB".into(), "_SB_.PWRB".into(),
vec![ vec![
&aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C0C")), &aml::Name::new("_HID".into(), &aml::EisaName::new("PNP0C0C")),
&aml::Name::new("_UID".into(), &aml::ZERO), &aml::Name::new("_UID".into(), &aml::ZERO),
], ],
) )
.to_aml_bytes(); .append_aml_bytes(bytes);
let ged_data = self self.ged_notification_device
.ged_notification_device
.as_ref() .as_ref()
.unwrap() .unwrap()
.lock() .lock()
.unwrap() .unwrap()
.to_aml_bytes(); .append_aml_bytes(bytes);
for segment in &self.pci_segments {
let pci_dsdt_data = segment.to_aml_bytes();
bytes.extend_from_slice(pci_dsdt_data.as_slice());
}
bytes.extend_from_slice(mbrd_dsdt_data.as_slice());
if self.config.lock().unwrap().serial.mode != ConsoleOutputMode::Off {
bytes.extend_from_slice(com1_dsdt_data.as_slice());
}
bytes.extend_from_slice(s5_sleep_data.as_slice());
bytes.extend_from_slice(power_button_dsdt_data.as_slice());
bytes.extend_from_slice(ged_data.as_slice());
bytes
} }
} }