Commit Graph

556 Commits

Author SHA1 Message Date
Rob Bradford
224f77500c devices: serial: Make the serial unit tests pass
Some refactoring has taken place since the unit tests were written:

The read/write in BusDevice now take a base address and the interrupt
handling code has changed necessitating the need for a new TestInterrupt
struct.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2019-07-16 17:09:05 +02:00
Rob Bradford
9e372a8e48 net_util: Bump pnet dependency
The older version of pnet had a bug which broke some of the behaviour
that the unit tests relied upon.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2019-07-16 17:09:05 +02:00
Rob Bradford
cb81f8be5b vmm: Make serial port controllable via command line
Add a "--serial" command line that takes as input either "off", "tty"
(default and current behaviour) and "file=/path/to/file".

When "--serial off" is used the serial device is not added to the VM
configuration at all.

Integration tests added that check for interrupts present (or not) and
that when sending to a file the file contains the expected serial
output.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2019-07-11 12:17:58 +01:00
Samuel Ortiz
00df79a530 README: Really fix the memory parameters examples
For real now...

Fixes: #96

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-11 08:49:38 +01:00
Samuel Ortiz
bc742d6a5f main: Add a PCI bridge class integration test
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-10 09:53:02 +02:00
Samuel Ortiz
2b2c31d206 pci: Use device PCI header type for our root bridge
The Bridge header type is really meant to be for PCI-to-PCI bridges.

Fixes: #85

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-10 09:53:02 +02:00
Samuel Ortiz
d6d9b76c7e README: Fix the memory parameter examples
We need to give it a unit.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-10 08:35:10 +02:00
Samuel Ortiz
7ed073805d config: Fix default memory size parameter
We need to give it a suffix.

Fixes: #96

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-10 08:35:10 +02:00
Sebastien Boeuf
d9ce29117e vmm: Flag --disk should be optional
Now that cloud-hypervisor VMM supports virtio-pmem, it can directly
boot a VM from an image exposed as a persistent memory block device.

That's why there is no need to force the --disk option as being
mandatory.

Fixes #90

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-07-09 21:58:02 +02:00
Sebastien Boeuf
f0a76ad424 vmm: Add support for multiple virtio-net devices
Until now, the VMM was only accepting a single instance of virtio-net
device. This commit extends the virtio-net support by allowing several
devices to be created for a single VM.

Fixes #71

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-07-09 18:55:30 +01:00
Sebastien Boeuf
a2947f9a9f cli: Accept K,M,G suffixes for size parameters
For every parameter dealing with a size as option, such as memory or
virtio-pmem, the CLI can now parse sizes with the suffixes K, M or G.

Fixes #70

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-07-09 15:22:26 +01:00
Jing Liu
2bb0b22cc1 pci: Refine pci topology
PciConfigIo is a legacy pci bus dispatcher, which manages all pci
devices including a pci root bridge. However, it is unnecessary to
design a complex hierarchy which redirects every access by PciRoot.

Since pci root bridge is also a pci device instance, and only contains
easy config space read/write, and PciConfigIo actually acts as a pci bus
to dispatch resource based resolving when VMExit, we re-arrange to make
the pci hierarchy clean.

Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
2019-07-09 10:01:18 +02:00
Samuel Ortiz
4605ecf1a8 pci: Extend the Device trait to carry the device BARs
When reading from or writing to a PCI BAR to handle a VM exit, we need
to have the BAR address itself to be able to support multiple BARs PCI
devices.

Fixes: #87

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-08 07:39:21 +02:00
Samuel Ortiz
8173e1ccd7 devices: Extend the Bus trait to carry the device range base
With the range base for the IO/MMIO vm exit address, a device with
multiple ranges has all the needed information for resolving which of
its range the exit is coming from

Fixes: #87

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-08 07:39:21 +02:00
Samuel Ortiz
42e545806c devices: bus: Return the range base address when resolving
When resolving an IO address to a device, return the range base address,
the offset, and the device itself.
This is needed for devices with multiple IO regions to find out which
region an IO/MMIO exit is coming from.

We also use this change as an opportunity to rename get_device to
resolve as we're doing more than just getting a device.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-08 07:39:21 +02:00
Samuel Ortiz
33796c4b0b devices: bus: Sync with crosvm code
Partial sync as we're not going to use the the full_addr boolean.
This is based on crosvm commit 44863792.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-08 07:39:21 +02:00
Samuel Ortiz
4a15316101 vm-virtio: Fix the network and storage PCI class and sub-class
Use the virtio device type to generate the righ class and subclass.

Fixes: #83

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-02 17:37:12 +02:00
Samuel Ortiz
77684f473d vm-virtio: Implement the u32 to VirtioDeviceType conversion
The From trait allows us to compare and convert an integer
with and into a virtio device type.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-02 17:37:12 +02:00
Samuel Ortiz
0b7fb42a6c pci: Export network and mass storage sub classes
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-07-02 17:37:12 +02:00
Rob Bradford
49d6b495d5 vmm: Remove println! from debugging
Remove println! left over from virtio-fs development.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2019-07-02 13:50:50 +02:00
Sebastien Boeuf
34e09923a5 vmm: Add support for multiple virtio-pmem devices
Until now, the VMM was only accepting a single instance of virtio-pmem
device. This commit extend the virtio-pmem support by allowing several
devices to be created for a single VM.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-07-01 14:38:55 +01:00
Sebastien Boeuf
785db6295e test: Add virtio-pmem integration tests
Add 2 integration tests to validate virtio-pmem works as expected.
One test takes care of checking the ability to read and write to this
persistent memory from the guest, and validates that the data is
carried over the virtualization boundary.
The other test ensures the VM can be booted directly from an image
that would be passed through virtio-pmem.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-07-01 14:38:55 +01:00
Sebastien Boeuf
294c26bfb7 vmm: Add virtio-pmem support to cloud-hypervisor
This patch plumbs the virtio-pmem device to the VMM. By adding a new
command line option "--pmem", we can now expose some persistent memory
to the guest OS, backed by the provided source.

The point of having such support in cloud-hypervisor is to be able to
share some memory between the host and the guest as DAXable.
One interesting use case is to boot directly from an image passed
through virtio-pmem, instead of going through virtio-blk. This can
allow good performances while avoiding the guest cache, which would
prevent the VM memory footprint from growing too much.

Fixes #68

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-07-01 14:38:55 +01:00
Sebastien Boeuf
8862d61042 vm-virtio: Add virtio-pmem implementation
This commit introduces the implementation of the virtio-pmem device
based on the pending proposal of the virtio specification here:
https://lists.oasis-open.org/archives/virtio-dev/201903/msg00083.html

It is also based on the kernel patches coming along with the virtio
proposal: https://lkml.org/lkml/2019/6/12/624

And it is based off of the current crosvm implementation found in
devices/src/virtio/pmem.rs relying on commit
bb340d9a94d48514cbe310d05e1ce539aae31264

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-07-01 14:38:55 +01:00
Sebastien Boeuf
c0336e83ea docs: Add virtio-fs documentation
Add some documentation specific to virtio-fs and how to perform
filesystem sharing between host and guest with cloud-hypervisor.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-27 21:46:00 +02:00
Sebastien Boeuf
1cb2378499 vmm: Add support for multiple virtio-fs devices
Until now, the VMM was only accepting a single instance of a virtio-fs
device. This commit extend the virtio-fs support by allowing several
devices to be created for a single VM.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-27 21:46:00 +02:00
Sebastien Boeuf
0fcca3ed74 tests: Add virtio-fs testing
This commit introduces the testing of the --fs option based on the
virtio-fs implementation. This does not simply add a test, but also
updates the integration script by generating a new kernel embedding
the virtio-fs patches and by downloading the virtiofsd daemon.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-27 21:46:00 +02:00
Sebastien Boeuf
53085c7ccc memory: Allow memory to be backed by a file
In the context of vhost-user, we need the guest RAM to be backed by
a file in order to be accessed by an external process. This patch
adds the new flag "file=" to the "--memory" option so that we can
specify from the command line if the memory needs to be backed, and
by which specific file.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-27 21:46:00 +02:00
Sebastien Boeuf
2ede30b6d3 vmm: Add virtio-fs support to the VMM
The user can now share some files and directories with the guest by
providing the corresponding vhost-user socket. The virtiofsd daemon
should be started by the user before to start the VM.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-27 21:46:00 +02:00
Sebastien Boeuf
1ddc8f2f0d vm-virtio: Add vhost-user-fs support
The vhost-user-fs or virtio-fs device allows files and directories to
be shared between host and guest. This patch adds the implementation
of this device to the cloud-hypervisor device model.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-27 21:46:00 +02:00
Sebastien Boeuf
8f70771b1d vhost_rs: Copy vhost crate from jiangliu/v1
In order to avoid cloud-hypervisor to rely on a pending PR for the empty
crate "vhost", this commit temporarily copies the content of the crate
based on branch jiangliu/v1 18b5081d9199c76eca49da1971c9d1a65e53e5ff.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-27 21:46:00 +02:00
Sebastien Boeuf
8dc06aa50d vm-virtio: Remove unneeded code
Remove legacy code coming from Firecracker and/or Crosvm.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-27 21:46:00 +02:00
Jing Liu
30266a41be vm-memory usage: vm-memory latest codes rename MmapError to Error
Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
2019-06-26 08:33:46 -07:00
Jing Liu
9da2343cb7 device: Improvement for BusDevice trait and PciDevice trait
BusDevice includes two methods which are only for PCI devices, which should
be as members of PciDevice trait for a better clean high level APIs.

Signed-off-by: Jing Liu <jing2.liu@linux.intel.com>
2019-06-25 06:17:30 -07:00
Sebastien Boeuf
5f7d520dc1 tests: Add split_irqchip test
Based on the newly added code, we expect the split irqchip to be used.
This means we should not see any "timer" or "cascade" components
attached to the IOAPIC since our userspace IOAPIC does not advertise
those.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-21 10:09:34 +02:00
Sebastien Boeuf
5e803ab18f vmm: Integrate userspace IOAPIC
The previous commit introduced a userspace implementation of an IOAPIC
and this commits aims to plumb it into the cloud-hypervisor VMM.

Here is the list of new things brought by this patch:
- Update the rust-vmm/kvm-ioctls dependency to benefit from latest
  patches including the support for split irqchip, and the vector
  being returned when a VM exit is caused by an EOI.
- Enable the split irqchip (which means no IOAPIC or PIC is emulated
  in kernel). This is done conditionally based on the support of the
  TSC_DEADLINE_TIMER from both KVM and the underlying CPU. The
  dependency on TSC_DEADLINE_TIMER is related to KVM which does not
  support creating the in kernel PIT if it has a split irqchip.
- Rely on callbacks to handle the following use cases:
  - in kernel IOAPIC + serial IRQ (pin based)
  - in kernel IOAPIC + virtio-pci MSI-X
  - in kernel IOAPIC + virtio-pci IRQ (pin based)
  - userspace IOAPIC + serial IRQ (pin based)
  - userspace IOAPIC + virtio-pci MSI-X
  - userspace IOAPIC + virtio-pci IRQ (pin based)

Fixes #13

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-21 10:09:34 +02:00
Sebastien Boeuf
950bd205c6 devices: Add userspace IOAPIC implementation
The goal for cloud-hypervisor is to keep the host safe. With this in
mind, we want to emulate as much as possible in userspace instead of
in kernel directly.

The IOAPIC is a good candidate to move from kernel to userspace, which
is why this commit introduces a userspace implementation of the IOAPIC
82093AA based on the documentation:
https://pdos.csail.mit.edu/6.828/2016/readings/ia32/ioapic.pdf

This code is inspired from the files devices/src/ioapic.rs and
devices/src/split_irqchip_common.rs from the crosvm codebase. The
reference version used being 6c1e23eee3065b3f3d6fc4fb992ac9884dbabf68.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-21 10:09:34 +02:00
Sebastien Boeuf
c8c4a4d444 devices: Create Interrupt trait to abstract interrupt delivery
This commit anticipate the future need from having support for both
in kernel and userspace IOAPIC. The way to signal an interrupt from
the serial device will vary depending on the use case, but this should
be independent from the serial implementation itself.

That's why this patch provides a generic trait for the serial device
to call from, so that it can trigger interrupts independently from the
IOAPIC type chosen (in kernel vs userspace).

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-21 10:09:34 +02:00
Sebastien Boeuf
2a7fbe8eae CI: Fix the Ubuntu VM update stuck on an interactive window
We need to export the variable DEBIAN_FRONTEND=noninteractive from the
Jenkinsfile if we want to make sure the VM update won't get stuck into
an interactive window.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-17 23:24:38 +02:00
Samuel Ortiz
fe43e86193 README: Use a permanent Slack invite link
The previous one was mistakenly set to expire after 30 days.

Fixes: #59

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2019-06-17 06:19:55 -07:00
Rob Bradford
c4c8b9314d build: Switch over to using rust-vmm linux-loader crate
With everything now merged upstream we no longer need to rely on Cathy's
fork.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2019-06-13 11:28:20 +01:00
Rob Bradford
226d3366d2 tests: Add direct boot test using bzImage
This supplements our direct booting test that uses vmlinux.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2019-06-13 11:28:20 +01:00
Cathy Zhang
429b53a672 vmm: Add bzimage loader support
VMM may load different format kernel image to start guest, we currently
only have elf loader support, so add bzimage loader support in case
that VMM would like to load bzimage.

Signed-off-by: Cathy Zhang <cathy.zhang@intel.com>
2019-06-13 11:28:20 +01:00
Chao Peng
0f54429848 vmm: Move all the CPUID related code to CpuidPatch
As more CPUID handling and CpuidPatch common code being added, it's
reasonable to move all the common code to the same place and in the
future we may consider move it to individual file when neccesary.

Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
2019-06-13 07:06:44 +02:00
Chao Peng
a0f4376eb0 vmm: Set the APIC ID in the extended topology
KVM exposes CPUID 0BH when host supports that, but the APIC ID that KVM
provides is the host APIC ID so we need replace that with ours.

Without this Linux guest reports something like:
[Firmware Bug]: CPU1: APIC id mismatch. Firmware: 1 APIC: 21

Fixes #42

Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
2019-06-13 07:06:44 +02:00
Sebastien Boeuf
0d0d19e223 vmm: Enable TSC_DEADLINE_TIMER allows for PIT emulation removal
As mentioned in the KVM documentation, TSC_DEADLINE_TIMER feature
needs some special checks to validate that it is supported as the
cpuid will always report it as disabled.

We need to use the KVM_CHECK_EXTENSION ioctl to request the value
of KVM_CAP_TSC_DEADLINE_TIMER. In case it is supported through
the local APIC emulation provided by the CREATE_IRQCHIP in KVM,
we have to set manually this feature by patching the cpuid.

Here quoted from the KVM documentation:
```
The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always
returned as false, since the feature depends on KVM_CREATE_IRQCHIP
for local APIC support. Instead it is reported via

  ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER)

if that returns true and you use KVM_CREATE_IRQCHIP, or if you
emulate the feature in userspace, then you can enable the feature
for KVM_SET_CPUID2.
```
This patch implements the behavior described above, and this allows
the VMM to remove the emulated Programmable Interval Timer (PIT) when
the TSC_DEADLINE_TIMER feature can be enabled.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-10 09:11:47 -07:00
Sebastien Boeuf
946a5d4f21 build: Update Cargo.lock for syn crate update
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-10 09:11:47 -07:00
Rob Bradford
72f3a69796 tests: Add test for booting from vmlinux
Download and build a Linux kernel and use the vmlinux produced as the
kernel used with a direct boot kernel test.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2019-06-10 16:49:34 +01:00
Rob Bradford
445b484881 fixup! resources: Shrink 5.0 kernel config 2019-06-10 16:49:34 +01:00
Rob Bradford
a45f473683 tests: Loosen memory check requirements
With slide variations in the kernel the memory size checks can fail so
round down the testing numbers to the nearest multiple of 1000 to make
the tests more stable.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2019-06-10 16:49:34 +01:00