Sebastien Boeuf 5f0b620148 arch: x86_64: Enable CR4 LA57 feature ...

In case the host CPU exposes the support for LA57 feature through its
cpuid, the CR4.LA57 bit is enabled accordingly.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>

2020-06-09 18:08:09 +01:00

..

src

arch: x86_64: Enable CR4 LA57 feature

2020-06-09 18:08:09 +01:00

Cargo.toml

build(deps): bump vm-memory from 0.2.0 to 0.2.1

2020-05-28 17:06:48 +01:00