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Jinank Jain 719cae217e hypervisor: mshv: Restrict MSR and CPUID visbility for MshvVcpu to x86 
MSR and CPUID are limited to x86 architecture so, reduce the visbility
of these two members inside struct MshvVcpu to just x86 architecture.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-20 09:49:48 +00:00
..
src hypervisor: mshv: Restrict MSR and CPUID visbility for MshvVcpu to x86 2024-03-20 09:49:48 +00:00
Cargo.toml build: Bump serde_with from 3.4.0 to 3.6.1 2024-03-06 09:11:03 +00:00