libvirt/tests/vircaps2xmldata/vircaps-aarch64-basic.xml

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<capabilities>
<host>
<cpu>
<arch>aarch64</arch>
</cpu>
<power_management/>
<iommu support='no'/>
<migration_features>
</migration_features>
<topology>
<cells num='4'>
<cell id='0'>
<memory unit='KiB'>1048576</memory>
<pages unit='KiB' size='4'>2048</pages>
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='4'>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' die_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' die_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' die_id='0' core_id='3' siblings='3'/>
</cpus>
</cell>
<cell id='1'>
<memory unit='KiB'>2097152</memory>
<pages unit='KiB' size='4'>4096</pages>
<pages unit='KiB' size='2048'>6144</pages>
<pages unit='KiB' size='1048576'>8192</pages>
<cpus num='4'>
<cpu id='4' socket_id='1' die_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='1' die_id='0' core_id='5' siblings='5'/>
<cpu id='6' socket_id='1' die_id='0' core_id='6' siblings='6'/>
<cpu id='7' socket_id='1' die_id='0' core_id='7' siblings='7'/>
</cpus>
</cell>
<cell id='2'>
<memory unit='KiB'>3145728</memory>
<pages unit='KiB' size='4'>6144</pages>
<pages unit='KiB' size='2048'>8192</pages>
<pages unit='KiB' size='1048576'>10240</pages>
<cpus num='4'>
<cpu id='8' socket_id='2' die_id='0' core_id='8' siblings='8'/>
<cpu id='9' socket_id='2' die_id='0' core_id='9' siblings='9'/>
<cpu id='10' socket_id='2' die_id='0' core_id='10' siblings='10'/>
<cpu id='11' socket_id='2' die_id='0' core_id='11' siblings='11'/>
</cpus>
</cell>
<cell id='3'>
<memory unit='KiB'>4194304</memory>
<pages unit='KiB' size='4'>8192</pages>
<pages unit='KiB' size='2048'>10240</pages>
<pages unit='KiB' size='1048576'>12288</pages>
<cpus num='4'>
<cpu id='12' socket_id='3' die_id='0' core_id='12' siblings='12'/>
<cpu id='13' socket_id='3' die_id='0' core_id='13' siblings='13'/>
<cpu id='14' socket_id='3' die_id='0' core_id='14' siblings='14'/>
<cpu id='15' socket_id='3' die_id='0' core_id='15' siblings='15'/>
</cpus>
</cell>
</cells>
</topology>
</host>
</capabilities>