External/libvirt
1
0
Fork 0
mirror of https://gitlab.com/libvirt/libvirt.git synced 2024-12-22 21:55:25 +00:00
Code Issues Packages Projects Releases Wiki Activity

cpu: Add IvyBridge-IBRS CPU model

Browse Source 
This is a variant of IvyBridge with indirect branch prediction
protection. The only difference between IvyBridge and IvyBridge-IBRS is
the added "spec-ctrl" feature.

The IvyBridge-IBRS model in QEMU is a bit different since IvyBridge got
several additional features since we added it in cpu_map.xml:
    arat, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
This commit is contained in:
Jiri Denemark 2018-01-08 20:53:25 +01:00
parent 30b381cfdd
commit 203c92e9cc
1 changed files with 50 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

50
src/cpu/cpu_map.xml
View File

@ -1123,6 +1123,56 @@
<feature name='xsave'/>
</model>
<model name='IvyBridge-IBRS'>
<signature family='6' model='58'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
<feature name='avx'/>
<feature name='clflush'/>
<feature name='cmov'/>
<feature name='cx16'/>
<feature name='cx8'/>
<feature name='de'/>
<feature name='erms'/>
<feature name='f16c'/>
<feature name='fpu'/>
<feature name='fsgsbase'/>
<feature name='fxsr'/>
<feature name='lahf_lm'/>
<feature name='lm'/>
<feature name='mca'/>
<feature name='mce'/>
<feature name='mmx'/>
<feature name='msr'/>
<feature name='mtrr'/>
<feature name='nx'/>
<feature name='pae'/>
<feature name='pat'/>
<feature name='pclmuldq'/>
<feature name='pge'/>
<feature name='pni'/>
<feature name='popcnt'/>
<feature name='pse'/>
<feature name='pse36'/>
<feature name='rdrand'/>
<feature name='rdtscp'/>
<feature name='sep'/>
<feature name='smep'/>
<feature name='spec-ctrl'/>
<feature name='sse'/>
<feature name='sse2'/>
<feature name='sse4.1'/>
<feature name='sse4.2'/>
<feature name='ssse3'/>
<feature name='syscall'/>
<feature name='tsc'/>
<feature name='tsc-deadline'/>
<feature name='vme'/>
<feature name='x2apic'/>
<feature name='xsave'/>
</model>
<model name='Haswell-noTSX'>
<signature family='6' model='60'/>
<vendor name='Intel'/>