cpu: Add Haswell-noTSX-IBRS CPU model

This is a variant of Haswell-noTSX with indirect branch prediction
protection. The only difference between Haswell-noTSX and
Haswell-noTSX-IBRS is the added "spec-ctrl" feature.

The Haswell-noTSX-IBRS model in QEMU is a bit different since
Haswell-noTSX got several additional features since we added it in
cpu_map.xml:
    arat, abm, f16c, rdrand, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
This commit is contained in:
Jiri Denemark 2018-01-09 20:40:03 +01:00
parent 203c92e9cc
commit 7dd85ff62d
4 changed files with 57 additions and 6 deletions

View File

@ -1226,6 +1226,60 @@
<feature name='xsave'/>
</model>
<model name='Haswell-noTSX-IBRS'>
<signature family='6' model='60'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
<feature name='avx'/>
<feature name='avx2'/>
<feature name='bmi1'/>
<feature name='bmi2'/>
<feature name='clflush'/>
<feature name='cmov'/>
<feature name='cx16'/>
<feature name='cx8'/>
<feature name='de'/>
<feature name='erms'/>
<feature name='fma'/>
<feature name='fpu'/>
<feature name='fsgsbase'/>
<feature name='fxsr'/>
<feature name='invpcid'/>
<feature name='lahf_lm'/>
<feature name='lm'/>
<feature name='mca'/>
<feature name='mce'/>
<feature name='mmx'/>
<feature name='movbe'/>
<feature name='msr'/>
<feature name='mtrr'/>
<feature name='nx'/>
<feature name='pae'/>
<feature name='pat'/>
<feature name='pcid'/>
<feature name='pclmuldq'/>
<feature name='pge'/>
<feature name='pni'/>
<feature name='popcnt'/>
<feature name='pse'/>
<feature name='pse36'/>
<feature name='rdtscp'/>
<feature name='sep'/>
<feature name='smep'/>
<feature name='spec-ctrl'/>
<feature name='sse'/>
<feature name='sse2'/>
<feature name='sse4.1'/>
<feature name='sse4.2'/>
<feature name='ssse3'/>
<feature name='syscall'/>
<feature name='tsc'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
<feature name='xsave'/>
</model>
<model name='Haswell'>
<signature family='6' model='60'/>
<vendor name='Intel'/>

View File

@ -1,5 +1,5 @@
<cpu mode='custom' match='exact'>
<model fallback='forbid'>Haswell-noTSX</model>
<model fallback='forbid'>Haswell-noTSX-IBRS</model>
<vendor>Intel</vendor>
<feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
@ -24,7 +24,6 @@
<feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='cmt'/>
<feature policy='require' name='spec-ctrl'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>

View File

@ -1,6 +1,6 @@
<cpu>
<arch>x86_64</arch>
<model>Haswell-noTSX</model>
<model>Haswell-noTSX-IBRS</model>
<vendor>Intel</vendor>
<feature name='vme'/>
<feature name='ds'/>
@ -25,7 +25,6 @@
<feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='cmt'/>
<feature name='spec-ctrl'/>
<feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>

View File

@ -1,5 +1,5 @@
<cpu mode='custom' match='exact'>
<model fallback='forbid'>Haswell-noTSX</model>
<model fallback='forbid'>Haswell-noTSX-IBRS</model>
<vendor>Intel</vendor>
<feature policy='require' name='vme'/>
<feature policy='require' name='ss'/>
@ -8,7 +8,6 @@
<feature policy='require' name='hypervisor'/>
<feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='spec-ctrl'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>