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perf: Add cache_l1d perf event support

Browse Source 
This patch adds support and documentation for
a generalized hardware cache event called cache_l1d
perf event.

Signed-off-by: Nitesh Konkar <nitkon12@linux.vnet.ibm.com>
This commit is contained in:
Nitesh Konkar 2017-01-06 18:25:41 +05:30 committed by John Ferlan
parent 0977ada851
commit ae16c95f1b
10 changed files with 36 additions and 4 deletions
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7
docs/formatdomain.html.in
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@ -1937,6 +1937,7 @@
&lt;event name='stalled_cycles_frontend' enabled='no'/&gt;
&lt;event name='stalled_cycles_backend' enabled='no'/&gt;
&lt;event name='ref_cpu_cycles' enabled='no'/&gt;
&lt;event name='cache_l1d' enabled='no'/&gt;
&lt;/perf&gt;
...
</pre>
@ -2015,6 +2016,12 @@
by applications running on the platform</td>
<td><code>perf.ref_cpu_cycles</code></td>
</tr>
<tr>
<td><code>cache_l1d</code></td>
<td>the count of total level 1 data cache by applications running on
the platform</td>
<td><code>perf.cache_l1d</code></td>
</tr>
</table>
<h3><a name="elementsDevices">Devices</a></h3>

5
docs/news.html.in
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@ -46,8 +46,9 @@
<li>perf: Add more perf statistics<br/>
Add support to get the count of branch instructions
executed, branch misses, bus cycles, stalled frontend
cpu cycles, stalled backend cpu cycles, and ref cpu
cycles by applications running on the platform
cpu cycles, stalled backend cpu cycles, ref cpu
cycles and cache l1d by applications running on
the platform
</li>
<li>conf: Display &lt;physical&gt; for volume xml<br/>
Add a display of the &lt;physical&gt; size of a disk

1
docs/schemas/domaincommon.rng
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@ -433,6 +433,7 @@
<value>stalled_cycles_frontend</value>
<value>stalled_cycles_backend</value>
<value>ref_cpu_cycles</value>
<value>cache_l1d</value>
</choice>
</attribute>
<attribute name="enabled">

11
include/libvirt/libvirt-domain.h
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@ -2188,6 +2188,17 @@ void virDomainStatsRecordListFree(virDomainStatsRecordPtr *stats);
*/
# define VIR_PERF_PARAM_REF_CPU_CYCLES "ref_cpu_cycles"
/**
* VIR_PERF_PARAM_CACHE_L1D:
*
* Macro for typed parameter name that represents cache_l1d
* perf event which can be used to measure the count of total
* level 1 data cache by applications running on the platform.
* It corresponds to the "perf.cache_l1d" field in the
* *Stats APIs.
*/
# define VIR_PERF_PARAM_CACHE_L1D "cache_l1d"
int virDomainGetPerfEvents(virDomainPtr dom,
virTypedParameterPtr *params,
int *nparams,

2
src/libvirt-domain.c
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@ -11250,6 +11250,8 @@ virConnectGetDomainCapabilities(virConnectPtr conn,
* CPU frequency scaling by applications running
* as unsigned long long. It is produced by the
* ref_cpu_cycles perf event.
* "perf.cache_l1d" - The count of total level 1 data cache as unsigned
* long long. It is produced by cache_l1d perf event.
*
* Note that entire stats groups or individual stat fields may be missing from
* the output in case they are not supported by the given hypervisor, are not

1
src/qemu/qemu_driver.c
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@ -9859,6 +9859,7 @@ qemuDomainSetPerfEvents(virDomainPtr dom,
VIR_PERF_PARAM_STALLED_CYCLES_FRONTEND, VIR_TYPED_PARAM_BOOLEAN,
VIR_PERF_PARAM_STALLED_CYCLES_BACKEND, VIR_TYPED_PARAM_BOOLEAN,
VIR_PERF_PARAM_REF_CPU_CYCLES, VIR_TYPED_PARAM_BOOLEAN,
VIR_PERF_PARAM_CACHE_L1D, VIR_TYPED_PARAM_BOOLEAN,
NULL) < 0)
return -1;

6
src/util/virperf.c
View File

@ -43,7 +43,8 @@ VIR_ENUM_IMPL(virPerfEvent, VIR_PERF_EVENT_LAST,
"cache_references", "cache_misses",
"branch_instructions", "branch_misses",
"bus_cycles", "stalled_cycles_frontend",
"stalled_cycles_backend", "ref_cpu_cycles");
"stalled_cycles_backend", "ref_cpu_cycles",
"cache_l1d");
struct virPerfEvent {
int type;
@ -112,6 +113,9 @@ static struct virPerfEventAttr attrs[] = {
.attrConfig = 0,
# endif
},
{.type = VIR_PERF_EVENT_CACHE_L1D,
.attrType = PERF_TYPE_HW_CACHE,
.attrConfig = PERF_COUNT_HW_CACHE_L1D},
};
typedef struct virPerfEventAttr *virPerfEventAttrPtr;

1
src/util/virperf.h
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@ -47,6 +47,7 @@ typedef enum {
the backend of the instruction
processor pipeline */
VIR_PERF_EVENT_REF_CPU_CYCLES, /* Count of ref cpu cycles */
VIR_PERF_EVENT_CACHE_L1D, /* Count of level 1 data cache*/
VIR_PERF_EVENT_LAST
} virPerfEventType;

1
tests/genericxml2xmlindata/generic-perf.xml
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@ -26,6 +26,7 @@
<event name='stalled_cycles_frontend' enabled='yes'/>
<event name='stalled_cycles_backend' enabled='yes'/>
<event name='ref_cpu_cycles' enabled='yes'/>
<event name='cache_l1d' enabled='yes'/>
</perf>
<devices>
</devices>

5
tools/virsh.pod
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@ -950,7 +950,8 @@ I<--perf> returns the statistics of all enabled perf events:
"perf.bus_cycles" - the count of bus cycles,
"perf.stalled_cycles_frontend" - the count of stalled frontend cpu cycles,
"perf.stalled_cycles_backend" - the count of stalled backend cpu cycles,
"perf.ref_cpu_cycles" - the count of ref cpu cycles
"perf.ref_cpu_cycles" - the count of ref cpu cycles,
"perf.cache_l1d" - the count of level 1 data cache
See the B<perf> command for more details about each event.
@ -2315,6 +2316,8 @@ B<Valid perf event names>
ref_cpu_cycles - Provides the count of total cpu cycles
not affected by CPU frequency scaling by
applications running on the platform.
cache_l1d - Provides the count of total level 1 data cache
by applications running on the platform.
B<Note>: The statistics can be retrieved using the B<domstats> command using
the I<--perf> flag.