Commit Graph

3 Commits

Author SHA1 Message Date
Jiri Denemark
eb1b551d21 cpu: Add support for "stibp" x86_64 feature
QEMU commit v3.1.0-4-g0e89165829
KVM patch: https://lore.kernel.org/lkml/20181205191956.31480-1-ehabkost@redhat.com/

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2018-12-17 17:27:32 +01:00
Jiri Denemark
7dd85ff62d cpu: Add Haswell-noTSX-IBRS CPU model
This is a variant of Haswell-noTSX with indirect branch prediction
protection. The only difference between Haswell-noTSX and
Haswell-noTSX-IBRS is the added "spec-ctrl" feature.

The Haswell-noTSX-IBRS model in QEMU is a bit different since
Haswell-noTSX got several additional features since we added it in
cpu_map.xml:
    arat, abm, f16c, rdrand, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:03 +01:00
Jiri Denemark
181acabef9 cputest: Add data for Intel(R) Xeon(R) CPU E5-2609 v3
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00