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This is a variant of Haswell-noTSX with indirect branch prediction protection. The only difference between Haswell-noTSX and Haswell-noTSX-IBRS is the added "spec-ctrl" feature. The Haswell-noTSX-IBRS model in QEMU is a bit different since Haswell-noTSX got several additional features since we added it in cpu_map.xml: arat, abm, f16c, rdrand, vme, xsaveopt Adding them only to the -IBRS variant would confuse our CPU detection code. Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
15 lines
557 B
XML
15 lines
557 B
XML
<cpu mode='custom' match='exact'>
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<model fallback='forbid'>Haswell-noTSX-IBRS</model>
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<vendor>Intel</vendor>
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<feature policy='require' name='vme'/>
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<feature policy='require' name='ss'/>
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<feature policy='require' name='f16c'/>
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<feature policy='require' name='rdrand'/>
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<feature policy='require' name='hypervisor'/>
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<feature policy='require' name='arat'/>
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<feature policy='require' name='tsc_adjust'/>
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<feature policy='require' name='xsaveopt'/>
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<feature policy='require' name='pdpe1gb'/>
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<feature policy='require' name='abm'/>
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</cpu>
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