libvirt/tests/vircaps2xmldata/vircaps-x86_64-basic.xml
Martin Kletzander ad589e1f52 tests: Enhance vircaps2xml test
Instead of generating all of the capabilities, let's test more of our
code by probing sysfs data.  This test needs quite some mocking for
now, but it paves the road for more future enhancements (hugepages
probing, for example).

Signed-off-by: Martin Kletzander <mkletzan@redhat.com>
2017-03-27 13:13:29 +02:00

63 lines
2.3 KiB
XML

<capabilities>
<host>
<cpu>
<arch>x86_64</arch>
</cpu>
<power_management/>
<topology>
<cells num='4'>
<cell id='0'>
<memory unit='KiB'>1048576</memory>
<pages unit='KiB' size='4'>2048</pages>
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='4'>
<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
</cpus>
</cell>
<cell id='1'>
<memory unit='KiB'>2097152</memory>
<pages unit='KiB' size='4'>4096</pages>
<pages unit='KiB' size='2048'>6144</pages>
<pages unit='KiB' size='1048576'>8192</pages>
<cpus num='4'>
<cpu id='4' socket_id='1' core_id='4' siblings='4'/>
<cpu id='5' socket_id='1' core_id='5' siblings='5'/>
<cpu id='6' socket_id='1' core_id='6' siblings='6'/>
<cpu id='7' socket_id='1' core_id='7' siblings='7'/>
</cpus>
</cell>
<cell id='2'>
<memory unit='KiB'>3145728</memory>
<pages unit='KiB' size='4'>6144</pages>
<pages unit='KiB' size='2048'>8192</pages>
<pages unit='KiB' size='1048576'>10240</pages>
<cpus num='4'>
<cpu id='8' socket_id='2' core_id='8' siblings='8'/>
<cpu id='9' socket_id='2' core_id='9' siblings='9'/>
<cpu id='10' socket_id='2' core_id='10' siblings='10'/>
<cpu id='11' socket_id='2' core_id='11' siblings='11'/>
</cpus>
</cell>
<cell id='3'>
<memory unit='KiB'>4194304</memory>
<pages unit='KiB' size='4'>8192</pages>
<pages unit='KiB' size='2048'>10240</pages>
<pages unit='KiB' size='1048576'>12288</pages>
<cpus num='4'>
<cpu id='12' socket_id='3' core_id='12' siblings='12'/>
<cpu id='13' socket_id='3' core_id='13' siblings='13'/>
<cpu id='14' socket_id='3' core_id='14' siblings='14'/>
<cpu id='15' socket_id='3' core_id='15' siblings='15'/>
</cpus>
</cell>
</cells>
</topology>
</host>
</capabilities>