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Jiri Denemark bb6cedd208 cpu_x86: Ignore enabled features for input models in x86DecodeUseCandidate 
While we don't want to aim for the shortest list of disabled features in
the baseline result (it would select a very old model), we want to do so
while looking at any of the input models for which we're trying to
compute a baseline CPU model. Given a set of input models, we always
want to take the least capable one of them (i.e., the one with shortest
list of disabled features) or a better model which is not one of the
input models.

So when considering an input model, we just check whether its list of
disabled features is shorter than the currently best one. When looking
at other models we check both enabled and disabled features while
penalizing disabled features as implemented by the previous patch.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Michal Privoznik <mprivozn@redhat.com>
2022-05-06 17:33:47 +02:00
..
cpu-data.py cpu-data.py: Query hyperv enlightenments 2022-01-28 10:55:03 +01:00
ppc64-baseline-incompatible-models.xml
ppc64-baseline-incompatible-vendors.xml
ppc64-baseline-legacy.xml
ppc64-baseline-no-vendor-result.xml
ppc64-baseline-no-vendor.xml
ppc64-baseline-same-model-result.xml
ppc64-baseline-same-model.xml
ppc64-guest-compat-bad.xml tests: Rename some test files in cputestdata 2020-10-07 11:26:37 +02:00
ppc64-guest-compat-incompatible.xml
ppc64-guest-compat-none.xml
ppc64-guest-compat-valid.xml
ppc64-guest-exact.xml
ppc64-guest-host-model.xml
ppc64-guest-legacy-bad.xml tests: Rename some test files in cputestdata 2020-10-07 11:26:37 +02:00
ppc64-guest-legacy-incompatible.xml
ppc64-guest-legacy.xml
ppc64-guest-nofallback.xml
ppc64-guest-strict.xml
ppc64-guest.xml
ppc64-host-better.xml
ppc64-host-incomp-arch.xml
ppc64-host-no-vendor.xml
ppc64-host-worse.xml
ppc64-host.xml
ppc64-host+guest-compat-bad.xml tests: Rename some test files in cputestdata 2020-10-07 11:26:37 +02:00
ppc64-host+guest-compat-incompatible.xml cpu_conf: Drop updateCPU from virCPUDefFormat 2017-09-21 15:23:39 +02:00
ppc64-host+guest-compat-none.xml cpu_conf: Don't format empty model for host-model CPUs 2019-11-25 15:29:19 +01:00
ppc64-host+guest-compat-valid.xml cpu_conf: Drop updateCPU from virCPUDefFormat 2017-09-21 15:23:39 +02:00
ppc64-host+guest-host-model.xml
ppc64-host+guest-legacy-bad.xml tests: Rename some test files in cputestdata 2020-10-07 11:26:37 +02:00
ppc64-host+guest-legacy-incompatible.xml
ppc64-host+guest-legacy,ppc_models-result.xml cputest: Don't test cpuGuestData 2016-11-15 15:49:16 +01:00
ppc64-host+guest-legacy.xml
ppc64-host+guest-nofallback.xml
ppc64-host+guest,ppc_models-result.xml cputest: Don't test cpuGuestData 2016-11-15 15:49:16 +01:00
ppc64-host+guest.xml
x86_64-baseline-features-expanded.xml cputest: Give better names to baseline tests 2022-05-06 17:33:46 +02:00
x86_64-baseline-features-result.xml cputest: Give better names to baseline tests 2022-05-06 17:33:46 +02:00
x86_64-baseline-features.xml cputest: Give better names to baseline tests 2022-05-06 17:33:46 +02:00
x86_64-baseline-incompatible-vendors.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-baseline-no-vendor-result.xml cpu_map: Disable cpu64-rhel* for host-model and baseline 2022-05-06 17:33:46 +02:00
x86_64-baseline-no-vendor.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-baseline-simple-expanded.xml cputest: Give better names to baseline tests 2022-05-06 17:33:46 +02:00
x86_64-baseline-simple-result.xml cputest: Give better names to baseline tests 2022-05-06 17:33:46 +02:00
x86_64-baseline-simple.xml cputest: Give better names to baseline tests 2022-05-06 17:33:46 +02:00
x86_64-baseline-some-vendors-result.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-baseline-some-vendors.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-baseline-Westmere+Nehalem-migratable.xml cpu_x86: Ignore enabled features for input models in x86DecodeUseCandidate 2022-05-06 17:33:47 +02:00
x86_64-baseline-Westmere+Nehalem-result.xml cpu_x86: Ignore enabled features for input models in x86DecodeUseCandidate 2022-05-06 17:33:47 +02:00
x86_64-baseline-Westmere+Nehalem.xml cputest: Give better names to baseline tests 2022-05-06 17:33:46 +02:00
x86_64-bogus-feature.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-bogus-model.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-bogus-vendor.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-A10-5800K-disabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-A10-5800K-enabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-A10-5800K-guest.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-A10-5800K-host.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-A10-5800K-json.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-A10-5800K.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-A10-5800K.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-A10-5800K.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Atom-D510-guest.xml cpu_x86: Penalize disabled features when computing CPU model 2022-05-06 17:33:47 +02:00
x86_64-cpuid-Atom-D510-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Atom-D510.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Atom-D510.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Atom-N450-guest.xml cpu_x86: Penalize disabled features when computing CPU model 2022-05-06 17:33:47 +02:00
x86_64-cpuid-Atom-N450-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Atom-N450.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Atom-N450.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Atom-P5362-disabled.xml cpu_map: Add support for split-lock-detect CPU feature 2021-01-07 23:23:31 +01:00
x86_64-cpuid-Atom-P5362-enabled.xml cputestdata: Add test data for Snowridge 2021-01-07 23:20:03 +01:00
x86_64-cpuid-Atom-P5362-guest.xml cpu_map: Define and enable Snowridge model 2021-01-07 23:23:41 +01:00
x86_64-cpuid-Atom-P5362-host.xml cpu_map: Add support for split-lock-detect CPU feature 2021-01-07 23:23:31 +01:00
x86_64-cpuid-Atom-P5362-json.xml cpu_map: Define and enable Snowridge model 2021-01-07 23:23:41 +01:00
x86_64-cpuid-Atom-P5362.json cputestdata: Add test data for Snowridge 2021-01-07 23:20:03 +01:00
x86_64-cpuid-Atom-P5362.sig cputestdata: Add test data for Snowridge 2021-01-07 23:20:03 +01:00
x86_64-cpuid-Atom-P5362.xml cputestdata: Add test data for Snowridge 2021-01-07 23:20:03 +01:00
x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml cpu_x86: Penalize disabled features when computing CPU model 2022-05-06 17:33:47 +02:00
x86_64-cpuid-baseline-Cascadelake+Icelake.xml cpu_x86: Penalize disabled features when computing CPU model 2022-05-06 17:33:47 +02:00
x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml cpu_x86: Penalize disabled features when computing CPU model 2022-05-06 17:33:47 +02:00
x86_64-cpuid-baseline-Cascadelake+Skylake.xml cputest: Add some real world baseline tests 2022-05-06 17:33:46 +02:00
x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml cpu_x86: Ignore enabled features for input models in x86DecodeUseCandidate 2022-05-06 17:33:47 +02:00
x86_64-cpuid-baseline-Cooperlake+Icelake.xml cpu_x86: Penalize disabled features when computing CPU model 2022-05-06 17:33:47 +02:00
x86_64-cpuid-baseline-EPYC+Rome.xml cputest: Add some real world baseline tests 2022-05-06 17:33:46 +02:00
x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.xml cputest: Add some real world baseline tests 2022-05-06 17:33:46 +02:00
x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IBRS.xml cputest: Add some real world baseline tests 2022-05-06 17:33:46 +02:00
x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml cputest: Add some real world baseline tests 2022-05-06 17:33:46 +02:00
x86_64-cpuid-baseline-Haswell+Skylake.xml cputest: Add some real world baseline tests 2022-05-06 17:33:46 +02:00
x86_64-cpuid-baseline-Ryzen+Rome.xml cputest: Add some real world baseline tests 2022-05-06 17:33:46 +02:00
x86_64-cpuid-baseline-Skylake-Client+Server.xml cputest: Add some real world baseline tests 2022-05-06 17:33:46 +02:00
x86_64-cpuid-Cooperlake-disabled.xml cputest: Add data for Cooperlake CPU 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Cooperlake-enabled.xml cpu_map: Add missing x86 features in 0x80000008 CPUID leaf 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Cooperlake-guest.xml cpu_map: Add Cooperlake x86 CPU model 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Cooperlake-host.xml cpu_map: Add Cooperlake x86 CPU model 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Cooperlake-json.xml cpu_map: Add missing x86 features in 0x80000008 CPUID leaf 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Cooperlake.json cputest: Add data for Cooperlake CPU 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Cooperlake.sig cputest: Add data for Cooperlake CPU 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Cooperlake.xml cputest: Add data for Cooperlake CPU 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Core2-E6850-disabled.xml cputest: Generate data for virCPUUpdateLive 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Core2-E6850-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core2-E6850-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core2-E6850-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core2-E6850-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core2-E6850.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Core2-E6850.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core2-E6850.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core2-Q9500-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core2-Q9500-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core2-Q9500.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core2-Q9500.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i5-650-disabled.xml cputest: New test for Intel Core i5-650 2018-04-18 11:39:53 +02:00
x86_64-cpuid-Core-i5-650-enabled.xml cputest: New test for Intel Core i5-650 2018-04-18 11:39:53 +02:00
x86_64-cpuid-Core-i5-650-guest.xml cputest: New test for Intel Core i5-650 2018-04-18 11:39:53 +02:00
x86_64-cpuid-Core-i5-650-host.xml cputest: New test for Intel Core i5-650 2018-04-18 11:39:53 +02:00
x86_64-cpuid-Core-i5-650-json.xml cpu_map: Add more signatures for Westmere CPU model 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i5-650.json cputest: New test for Intel Core i5-650 2018-04-18 11:39:53 +02:00
x86_64-cpuid-Core-i5-650.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i5-650.xml cputest: New test for Intel Core i5-650 2018-04-18 11:39:53 +02:00
x86_64-cpuid-Core-i5-2500-disabled.xml cputest: Generate data for virCPUUpdateLive 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Core-i5-2500-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i5-2500-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i5-2500-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i5-2500-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i5-2500.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Core-i5-2500.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i5-2500.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i5-2540M-disabled.xml cputest: Generate data for virCPUUpdateLive 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Core-i5-2540M-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i5-2540M-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i5-2540M-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i5-2540M-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i5-2540M.json cputest: Add query-cpu-definitions reply for Core-i5-2540M 2017-10-16 09:23:20 +02:00
x86_64-cpuid-Core-i5-2540M.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i5-2540M.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i5-4670T-disabled.xml cputest: Disable TSX on broken models 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Core-i5-4670T-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i5-4670T-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i5-4670T-host.xml cpu_x86: Disable TSX on broken models 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Core-i5-4670T-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i5-4670T.json cputest: Disable TSX on broken models 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Core-i5-4670T.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i5-4670T.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i5-6600-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Core-i5-6600-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i5-6600-guest.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Core-i5-6600-host.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Core-i5-6600-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i5-6600.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Core-i5-6600.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i5-6600.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-2600-disabled.xml cputest: Update Core-i7-2600 data 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Core-i7-2600-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-2600-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-2600-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-2600-json.xml cputest: Update Core-i7-2600 data 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Core-i7-2600-xsaveopt-disabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-2600-xsaveopt-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-2600-xsaveopt-guest.xml cputest: Make a crippled version of Core-i7-2600 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Core-i7-2600-xsaveopt-host.xml cputest: Make a crippled version of Core-i7-2600 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Core-i7-2600-xsaveopt-json.xml cputest: Make a crippled version of Core-i7-2600 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Core-i7-2600-xsaveopt.json cputest: Make a crippled version of Core-i7-2600 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Core-i7-2600-xsaveopt.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-2600-xsaveopt.xml cputest: Make a crippled version of Core-i7-2600 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Core-i7-2600.json cputest: Update Core-i7-2600 data 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Core-i7-2600.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-2600.xml cputest: Update Core-i7-2600 data 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Core-i7-3520M-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-3520M-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-3520M.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-3520M.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-3740QM-disabled.xml cputest: Generate data for virCPUUpdateLive 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Core-i7-3740QM-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-3740QM-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-3740QM-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-3740QM-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-3740QM.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Core-i7-3740QM.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-3740QM.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-3770-disabled.xml cputest: Generate data for virCPUUpdateLive 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Core-i7-3770-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-3770-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-3770-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-3770-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-3770.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Core-i7-3770.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-3770.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-4510U-disabled.xml cputest: Generate data for virCPUUpdateLive 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Core-i7-4510U-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-4510U-guest.xml cputest: New test for Intel Core i7-4510U 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-4510U-host.xml cputest: New test for Intel Core i7-4510U 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-4510U-json.xml cputest: New test for Intel Core i7-4510U 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-4510U.json cputest: New test for Intel Core i7-4510U 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-4510U.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-4510U.xml cputest: New test for Intel Core i7-4510U 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-4600U-disabled.xml cputest: Generate data for virCPUUpdateLive 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Core-i7-4600U-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-4600U-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-4600U-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-4600U-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-4600U.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Core-i7-4600U.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-4600U.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-5600U-arat-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Core-i7-5600U-arat-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-5600U-arat-guest.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Core-i7-5600U-arat-host.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Core-i7-5600U-arat-json.xml cpu_x86: Properly disable unknown CPU features 2017-07-13 09:53:15 +02:00
x86_64-cpuid-Core-i7-5600U-arat.json cpu_x86: Properly disable unknown CPU features 2017-07-13 09:53:15 +02:00
x86_64-cpuid-Core-i7-5600U-arat.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-5600U-arat.xml cpu_x86: Properly disable unknown CPU features 2017-07-13 09:53:15 +02:00
x86_64-cpuid-Core-i7-5600U-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Core-i7-5600U-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-5600U-guest.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Core-i7-5600U-host.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Core-i7-5600U-ibrs-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Core-i7-5600U-ibrs-enabled.xml cputest: Add data for updated Intel(R) Core(TM) i7-5600U CPU 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml cpu: Add support for "stibp" x86_64 feature 2018-12-17 17:27:32 +01:00
x86_64-cpuid-Core-i7-5600U-ibrs-host.xml cpu: Add support for "stibp" x86_64 feature 2018-12-17 17:27:32 +01:00
x86_64-cpuid-Core-i7-5600U-ibrs-json.xml cputest: Add data for updated Intel(R) Core(TM) i7-5600U CPU 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Core-i7-5600U-ibrs.json cputest: Add data for updated Intel(R) Core(TM) i7-5600U CPU 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Core-i7-5600U-ibrs.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-5600U-ibrs.xml cputest: Add data for updated Intel(R) Core(TM) i7-5600U CPU 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Core-i7-5600U-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Core-i7-5600U.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Core-i7-5600U.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-5600U.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Core-i7-7600U-disabled.xml cputest: Add data for Intel(R) Core(TM) i7-7600U 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Core-i7-7600U-enabled.xml cpu_map: Introduce IA32_ARCH_CAPABILITIES MSR features 2019-06-20 14:02:36 +02:00
x86_64-cpuid-Core-i7-7600U-guest.xml cputest: Add data for Intel(R) Core(TM) i7-7600U 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Core-i7-7600U-host.xml cputest: Add data for Intel(R) Core(TM) i7-7600U 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Core-i7-7600U-json.xml cpu_map: Introduce IA32_ARCH_CAPABILITIES MSR features 2019-06-20 14:02:36 +02:00
x86_64-cpuid-Core-i7-7600U.json cputest: Add data for Intel(R) Core(TM) i7-7600U 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Core-i7-7600U.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-7600U.xml cputest: Add data for Intel(R) Core(TM) i7-7600U 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Core-i7-7700-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Core-i7-7700-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Core-i7-7700-guest.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Core-i7-7700-host.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Core-i7-7700-json.xml cputest: Add data for Intel(R) Core(TM) i7-7700 CPU 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Core-i7-7700.json cputest: Add data for Intel(R) Core(TM) i7-7700 CPU 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Core-i7-7700.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-7700.xml cputest: Add data for Intel(R) Core(TM) i7-7700 CPU 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Core-i7-8550U-disabled.xml cputest: Add data for Intel(R) Core(TM) i7-8550U CPU without TSX 2020-03-09 16:17:34 +01:00
x86_64-cpuid-Core-i7-8550U-enabled.xml cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Core-i7-8550U-guest.xml cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Core-i7-8550U-host.xml cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Core-i7-8550U-json.xml cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Core-i7-8550U.json cputest: Add data for Intel(R) Core(TM) i7-8550U CPU without TSX 2020-03-09 16:17:34 +01:00
x86_64-cpuid-Core-i7-8550U.sig cputest: Add data for Intel(R) Core(TM) i7-8550U CPU without TSX 2020-03-09 16:17:34 +01:00
x86_64-cpuid-Core-i7-8550U.xml cputest: Add data for Intel(R) Core(TM) i7-8550U CPU without TSX 2020-03-09 16:17:34 +01:00
x86_64-cpuid-Core-i7-8700-disabled.xml cputest: Add data for Intel(R) Core(TM) i7-8700 2019-03-05 14:38:35 +01:00
x86_64-cpuid-Core-i7-8700-enabled.xml cputest: Add data for Intel(R) Core(TM) i7-8700 2019-03-05 14:38:35 +01:00
x86_64-cpuid-Core-i7-8700-guest.xml cputest: Add data for Intel(R) Core(TM) i7-8700 2019-03-05 14:38:35 +01:00
x86_64-cpuid-Core-i7-8700-host.xml cputest: Add data for Intel(R) Core(TM) i7-8700 2019-03-05 14:38:35 +01:00
x86_64-cpuid-Core-i7-8700-json.xml cputest: Add data for Intel(R) Core(TM) i7-8700 2019-03-05 14:38:35 +01:00
x86_64-cpuid-Core-i7-8700.json cputest: Add data for Intel(R) Core(TM) i7-8700 2019-03-05 14:38:35 +01:00
x86_64-cpuid-Core-i7-8700.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Core-i7-8700.xml cputest: Add data for Intel(R) Core(TM) i7-8700 2019-03-05 14:38:35 +01:00
x86_64-cpuid-EPYC-7502-32-Core-disabled.xml Add testdata for AMD EPYC 7502 2020-10-07 17:25:02 +02:00
x86_64-cpuid-EPYC-7502-32-Core-enabled.xml Add testdata for AMD EPYC 7502 2020-10-07 17:25:02 +02:00
x86_64-cpuid-EPYC-7502-32-Core-guest.xml cpumap: Add support for ibrs CPU feature 2021-03-01 20:09:46 +01:00
x86_64-cpuid-EPYC-7502-32-Core-host.xml cpumap: Add support for ibrs CPU feature 2021-03-01 20:09:46 +01:00
x86_64-cpuid-EPYC-7502-32-Core-json.xml cpu_map: Remove monitor feature from EPYC-Rome 2020-10-08 09:58:44 +02:00
x86_64-cpuid-EPYC-7502-32-Core.json Add testdata for AMD EPYC 7502 2020-10-07 17:25:02 +02:00
x86_64-cpuid-EPYC-7502-32-Core.sig Add testdata for AMD EPYC 7502 2020-10-07 17:25:02 +02:00
x86_64-cpuid-EPYC-7502-32-Core.xml Add testdata for AMD EPYC 7502 2020-10-07 17:25:02 +02:00
x86_64-cpuid-EPYC-7601-32-Core-disabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-EPYC-7601-32-Core-enabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-EPYC-7601-32-Core-guest.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-EPYC-7601-32-Core-host.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-EPYC-7601-32-Core-ibpb-disabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-EPYC-7601-32-Core-ibpb-enabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-EPYC-7601-32-Core-ibpb-guest.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-EPYC-7601-32-Core-ibpb-host.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-EPYC-7601-32-Core-ibpb-json.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-EPYC-7601-32-Core-ibpb.json cpu_map: Add support for arch-capabilities feature 2019-01-10 16:39:57 +01:00
x86_64-cpuid-EPYC-7601-32-Core-ibpb.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-EPYC-7601-32-Core-ibpb.xml cputest: Add data for updated AMD EPYC 7601 32-Core Processor 2018-01-17 17:07:02 +01:00
x86_64-cpuid-EPYC-7601-32-Core-json.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-EPYC-7601-32-Core.json tests: Add CPUID data for AMD EPYC 7601 32-Core Processor 2017-09-07 13:53:32 +02:00
x86_64-cpuid-EPYC-7601-32-Core.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-EPYC-7601-32-Core.xml tests: Add CPUID data for AMD EPYC 7601 32-Core Processor 2017-09-07 13:53:32 +02:00
x86_64-cpuid-FX-8150-guest.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-FX-8150-host.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-FX-8150.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-FX-8150.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Hygon-C86-7185-32-core-disabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Hygon-C86-7185-32-core-enabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Hygon-C86-7185-32-core-guest.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Hygon-C86-7185-32-core-host.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Hygon-C86-7185-32-core-json.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Hygon-C86-7185-32-core.json cputest: Add CPUID data for Hygon Dhyana 7185 32-core Processor 2019-12-13 13:05:01 +00:00
x86_64-cpuid-Hygon-C86-7185-32-core.sig cputest: Add CPUID data for Hygon Dhyana 7185 32-core Processor 2019-12-13 13:05:01 +00:00
x86_64-cpuid-Hygon-C86-7185-32-core.xml cputest: Add CPUID data for Hygon Dhyana 7185 32-core Processor 2019-12-13 13:05:01 +00:00
x86_64-cpuid-Ice-Lake-Server-disabled.xml cpu_map: Add support for fsrm CPU feature 2021-01-07 23:22:49 +01:00
x86_64-cpuid-Ice-Lake-Server-enabled.xml cputest: Add data for Ice Lake Server CPU 2019-11-12 20:14:16 +01:00
x86_64-cpuid-Ice-Lake-Server-guest.xml cpu_map: Remove intel-pt from x86 CPU models 2021-01-26 15:44:50 +01:00
x86_64-cpuid-Ice-Lake-Server-host.xml cpu_map: Remove intel-pt from x86 CPU models 2021-01-26 15:44:50 +01:00
x86_64-cpuid-Ice-Lake-Server-json.xml cpu_map: Drop pconfig from Icelake-Server CPU model 2019-11-12 20:14:16 +01:00
x86_64-cpuid-Ice-Lake-Server.json cputest: Add data for Ice Lake Server CPU 2019-11-12 20:14:16 +01:00
x86_64-cpuid-Ice-Lake-Server.sig cputest: Add data for Ice Lake Server CPU 2019-11-12 20:14:16 +01:00
x86_64-cpuid-Ice-Lake-Server.xml cputest: Add data for Ice Lake Server CPU 2019-11-12 20:14:16 +01:00
x86_64-cpuid-Opteron-1352-guest.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Opteron-1352-host.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Opteron-1352.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Opteron-1352.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Opteron-2350-disabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Opteron-2350-enabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Opteron-2350-guest.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Opteron-2350-host.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Opteron-2350-json.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Opteron-2350.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Opteron-2350.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Opteron-2350.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Opteron-6234-disabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Opteron-6234-enabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Opteron-6234-guest.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Opteron-6234-host.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Opteron-6234-json.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Opteron-6234.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Opteron-6234.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Opteron-6234.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Opteron-6282-guest.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Opteron-6282-host.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Opteron-6282.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Opteron-6282.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Pentium-P6100-guest.xml cpu_map: Add more signatures for Westmere CPU model 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Pentium-P6100-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Pentium-P6100.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Pentium-P6100.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Phenom-B95-disabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Phenom-B95-enabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Phenom-B95-guest.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Phenom-B95-host.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Phenom-B95-json.xml cpu_x86: Penalize disabled features when computing CPU model 2022-05-06 17:33:47 +02:00
x86_64-cpuid-Phenom-B95.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Phenom-B95.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Phenom-B95.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Ryzen-7-1800X-Eight-Core-disabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Ryzen-7-1800X-Eight-Core-enabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Ryzen-7-1800X-Eight-Core-guest.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Ryzen-7-1800X-Eight-Core-host.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Ryzen-7-1800X-Eight-Core-json.xml cpu_map: Drop 'monitor' from modern x86 CPU models 2020-11-24 20:13:23 +01:00
x86_64-cpuid-Ryzen-7-1800X-Eight-Core.json tests: Add CPUID data for AMD Ryzen 7 1800X Eight-Core Processor 2017-09-07 13:53:32 +02:00
x86_64-cpuid-Ryzen-7-1800X-Eight-Core.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Ryzen-7-1800X-Eight-Core.xml tests: Add CPUID data for AMD Ryzen 7 1800X Eight-Core Processor 2017-09-07 13:53:32 +02:00
x86_64-cpuid-Ryzen-9-3900X-12-Core-disabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Ryzen-9-3900X-12-Core-enabled.xml cpu_map: Add missing AMD SVM features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Ryzen-9-3900X-12-Core-guest.xml cpu_map: Remove monitor feature from EPYC-Rome 2020-10-08 09:58:44 +02:00
x86_64-cpuid-Ryzen-9-3900X-12-Core-host.xml cpu_map: Remove monitor feature from EPYC-Rome 2020-10-08 09:58:44 +02:00
x86_64-cpuid-Ryzen-9-3900X-12-Core-json.xml cpu_map: Remove monitor feature from EPYC-Rome 2020-10-08 09:58:44 +02:00
x86_64-cpuid-Ryzen-9-3900X-12-Core.json cputest: Update QEMU data for Ryzen 9 3900X 2020-10-07 18:42:17 +02:00
x86_64-cpuid-Ryzen-9-3900X-12-Core.sig cputest: Add data for AMD Ryzen 9 3900X 12-Core Processor 2020-05-13 18:30:45 +02:00
x86_64-cpuid-Ryzen-9-3900X-12-Core.xml cputest: Add data for AMD Ryzen 9 3900X 12-Core Processor 2020-05-13 18:30:45 +02:00
x86_64-cpuid-Xeon-5110-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Xeon-5110-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Xeon-5110.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-5110.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Xeon-E3-1225-v5-disabled.xml cputest: Add data for Intel(R) Xeon(R) CPU E3-1225 v5 2019-05-14 19:33:37 +02:00
x86_64-cpuid-Xeon-E3-1225-v5-enabled.xml cpu_map: Define md-clear CPUID bit 2019-05-14 19:33:37 +02:00
x86_64-cpuid-Xeon-E3-1225-v5-guest.xml cpu_map: Define md-clear CPUID bit 2019-05-14 19:33:37 +02:00
x86_64-cpuid-Xeon-E3-1225-v5-host.xml cpu_map: Define md-clear CPUID bit 2019-05-14 19:33:37 +02:00
x86_64-cpuid-Xeon-E3-1225-v5-json.xml cpu_map: Define md-clear CPUID bit 2019-05-14 19:33:37 +02:00
x86_64-cpuid-Xeon-E3-1225-v5.json cputest: Add data for Intel(R) Xeon(R) CPU E3-1225 v5 2019-05-14 19:33:37 +02:00
x86_64-cpuid-Xeon-E3-1225-v5.sig cputest: Add data for Intel(R) Xeon(R) CPU E3-1225 v5 2019-05-14 19:33:37 +02:00
x86_64-cpuid-Xeon-E3-1225-v5.xml cputest: Add data for Intel(R) Xeon(R) CPU E3-1225 v5 2019-05-14 19:33:37 +02:00
x86_64-cpuid-Xeon-E3-1245-v5-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Xeon-E3-1245-v5-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Xeon-E3-1245-v5-guest.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Xeon-E3-1245-v5-host.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Xeon-E3-1245-v5-json.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E3-1245-v5.json cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E3-1245-v5.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E3-1245-v5.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2609-v3-disabled.xml cpu: Add support for "stibp" x86_64 feature 2018-12-17 17:27:32 +01:00
x86_64-cpuid-Xeon-E5-2609-v3-enabled.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2609 v3 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Xeon-E5-2609-v3-guest.xml cpu: Add support for "stibp" x86_64 feature 2018-12-17 17:27:32 +01:00
x86_64-cpuid-Xeon-E5-2609-v3-host.xml cpu: Add support for "stibp" x86_64 feature 2018-12-17 17:27:32 +01:00
x86_64-cpuid-Xeon-E5-2609-v3-json.xml cpu: Add Haswell-noTSX-IBRS CPU model 2018-01-17 17:07:03 +01:00
x86_64-cpuid-Xeon-E5-2609-v3.json cpu_map: Add support for arch-capabilities feature 2019-01-10 16:39:57 +01:00
x86_64-cpuid-Xeon-E5-2609-v3.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2609-v3.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2609 v3 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Xeon-E5-2623-v4-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Xeon-E5-2623-v4-enabled.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2623 v4 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Xeon-E5-2623-v4-guest.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2623-v4-host.xml cpu: Add support for "stibp" x86_64 feature 2018-12-17 17:27:32 +01:00
x86_64-cpuid-Xeon-E5-2623-v4-json.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2623-v4.json cpu_map: Add support for arch-capabilities feature 2019-01-10 16:39:57 +01:00
x86_64-cpuid-Xeon-E5-2623-v4.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2623-v4.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2623 v4 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Xeon-E5-2630-v3-disabled.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2630-v3-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Xeon-E5-2630-v3-guest.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2630-v3-host.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2630-v3-json.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2630-v3.json cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2630-v3.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2630-v3.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2630-v4-disabled.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2630 v4 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2630-v4-enabled.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2630 v4 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2630-v4-guest.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2630-v4-host.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2630 v4 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2630-v4-json.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2630-v4.json cputest: Add data for Intel(R) Xeon(R) CPU E5-2630 v4 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2630-v4.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2630-v4.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2630 v4 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2650-disabled.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2650-enabled.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2650-guest.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2650-host.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2650-json.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2650-v3-disabled.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2650-v3-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Xeon-E5-2650-v3-guest.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2650-v3-host.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2650-v3-json.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2650-v3.json cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2650-v3.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2650-v3.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2650-v4-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Xeon-E5-2650-v4-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Xeon-E5-2650-v4-guest.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2650-v4-host.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Xeon-E5-2650-v4-json.xml cpu_map: Add more signatures for Broadwell CPU models 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2650-v4.json cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 v4 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2650-v4.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2650-v4.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 v4 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E5-2650.json cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E5-2650.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E5-2650.xml cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E7-4820-disabled.xml cputest: Generate data for virCPUUpdateLive 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Xeon-E7-4820-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Xeon-E7-4820-guest.xml cpu_map: Add more signatures for Westmere CPU model 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E7-4820-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Xeon-E7-4820-json.xml cpu_map: Add more signatures for Westmere CPU model 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E7-4820.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Xeon-E7-4820.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E7-4820.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Xeon-E7-4830-disabled.xml cputest: Add CPUID data for Intel(R) Xeon(R) CPU E7-4830 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Xeon-E7-4830-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Xeon-E7-4830-guest.xml cputest: Add query-cpu-definitions reply for Xeon-E7-4830 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Xeon-E7-4830-host.xml cputest: Add CPUID data for Intel(R) Xeon(R) CPU E7-4830 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Xeon-E7-4830-json.xml cpu_map: Add more signatures for Westmere CPU model 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E7-4830.json cputest: Add query-cpu-definitions reply for Xeon-E7-4830 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Xeon-E7-4830.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E7-4830.xml cputest: Add CPUID data for Intel(R) Xeon(R) CPU E7-4830 2017-10-16 09:23:21 +02:00
x86_64-cpuid-Xeon-E7-8890-v3-disabled.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E7-8890-v3-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Xeon-E7-8890-v3-guest.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E7-8890-v3-host.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E7-8890-v3-json.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E7-8890-v3.json cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E7-8890-v3.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E7-8890-v3.xml cputest: Do not drop v[0-9] from CPU names 2017-11-07 23:40:47 +01:00
x86_64-cpuid-Xeon-E7540-disabled.xml cputest: Add data for Intel(R) Xeon(R) CPU E7540 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E7540-enabled.xml cputest: Add data for Intel(R) Xeon(R) CPU E7540 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E7540-guest.xml cputest: Add data for Intel(R) Xeon(R) CPU E7540 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E7540-host.xml cputest: Add data for Intel(R) Xeon(R) CPU E7540 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E7540-json.xml cputest: Add data for Intel(R) Xeon(R) CPU E7540 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E7540.json cputest: Add data for Intel(R) Xeon(R) CPU E7540 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-E7540.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-E7540.xml cputest: Add data for Intel(R) Xeon(R) CPU E7540 2019-03-05 14:38:03 +01:00
x86_64-cpuid-Xeon-Gold-5115-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Xeon-Gold-5115-enabled.xml cputest: Add data for Intel(R) Xeon(R) Gold 5115 CPU 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Xeon-Gold-5115-guest.xml cpu: Add support for "stibp" x86_64 feature 2018-12-17 17:27:32 +01:00
x86_64-cpuid-Xeon-Gold-5115-host.xml cpu: Add support for "stibp" x86_64 feature 2018-12-17 17:27:32 +01:00
x86_64-cpuid-Xeon-Gold-5115-json.xml cpu: Add Skylake-Server-IBRS CPU model 2018-01-17 17:07:04 +01:00
x86_64-cpuid-Xeon-Gold-5115.json cpu_map: Add support for arch-capabilities feature 2019-01-10 16:39:57 +01:00
x86_64-cpuid-Xeon-Gold-5115.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-Gold-5115.xml cputest: Add data for Intel(R) Xeon(R) Gold 5115 CPU 2018-01-17 17:07:02 +01:00
x86_64-cpuid-Xeon-Gold-6130-disabled.xml cputest: Add data for Intel(R) Xeon(R) Gold 6130 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Gold-6130-enabled.xml cputest: Add data for Intel(R) Xeon(R) Gold 6130 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Gold-6130-guest.xml cpu_map: Distinguish Cascadelake-Server from Skylake-Server 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Gold-6130-host.xml cputest: Add data for Intel(R) Xeon(R) Gold 6130 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Gold-6130-json.xml cpu_map: Distinguish Cascadelake-Server from Skylake-Server 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Gold-6130.json cputest: Add data for Intel(R) Xeon(R) Gold 6130 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Gold-6130.sig cputest: Add data for Intel(R) Xeon(R) Gold 6130 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Gold-6130.xml cputest: Add data for Intel(R) Xeon(R) Gold 6130 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Gold-6148-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Xeon-Gold-6148-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Xeon-Gold-6148-guest.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Xeon-Gold-6148-host.xml cpu_map: Add features for Icelake CPUs 2018-09-19 14:05:59 +02:00
x86_64-cpuid-Xeon-Gold-6148-json.xml cpu: Add new Skylake-Server CPU model 2017-09-18 15:10:46 +02:00
x86_64-cpuid-Xeon-Gold-6148.json tests: Add CPUID data for Intel(R) Xeon(R) Gold 6148 CPU 2017-09-18 15:10:46 +02:00
x86_64-cpuid-Xeon-Gold-6148.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-Gold-6148.xml tests: Add CPUID data for Intel(R) Xeon(R) Gold 6148 CPU 2017-09-18 15:10:46 +02:00
x86_64-cpuid-Xeon-Platinum-8268-disabled.xml cpu_map: Request test files update when adding x86 features 2020-06-19 21:59:31 +02:00
x86_64-cpuid-Xeon-Platinum-8268-enabled.xml cpu_map: Introduce IA32_ARCH_CAPABILITIES MSR features 2019-06-20 14:02:36 +02:00
x86_64-cpuid-Xeon-Platinum-8268-guest.xml cpu_map: Introduce IA32_ARCH_CAPABILITIES MSR features 2019-06-20 14:02:36 +02:00
x86_64-cpuid-Xeon-Platinum-8268-host.xml cpu_map: Introduce IA32_ARCH_CAPABILITIES MSR features 2019-06-20 14:02:36 +02:00
x86_64-cpuid-Xeon-Platinum-8268-json.xml cpu_map: Introduce IA32_ARCH_CAPABILITIES MSR features 2019-06-20 14:02:36 +02:00
x86_64-cpuid-Xeon-Platinum-8268.json cputest: Add data for Intel(R) Xeon(R) Platinum 8268 CPU 2019-04-12 22:53:39 +02:00
x86_64-cpuid-Xeon-Platinum-8268.sig cputest: Add data for Intel(R) Xeon(R) Platinum 8268 CPU 2019-04-12 22:53:39 +02:00
x86_64-cpuid-Xeon-Platinum-8268.xml cputest: Add support for MSR features to cpu-parse.sh 2019-04-12 22:53:39 +02:00
x86_64-cpuid-Xeon-Platinum-9242-disabled.xml cputest: Add data for Intel(R) Xeon(R) Platinum 9242 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Platinum-9242-enabled.xml cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Xeon-Platinum-9242-guest.xml cputest: Add data for Intel(R) Xeon(R) Platinum 9242 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Platinum-9242-host.xml cputest: Add data for Intel(R) Xeon(R) Platinum 9242 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Platinum-9242-json.xml cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR 2020-05-25 19:20:21 +02:00
x86_64-cpuid-Xeon-Platinum-9242.json cputest: Add data for Intel(R) Xeon(R) Platinum 9242 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Platinum-9242.sig cputest: Add data for Intel(R) Xeon(R) Platinum 9242 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-Platinum-9242.xml cputest: Add data for Intel(R) Xeon(R) Platinum 9242 CPU 2020-04-08 17:52:50 +02:00
x86_64-cpuid-Xeon-W3520-disabled.xml cputest: Generate data for virCPUUpdateLive 2017-03-27 16:29:27 +02:00
x86_64-cpuid-Xeon-W3520-enabled.xml cputest: Fix cpu-cpuid.py diff command 2018-01-10 11:07:23 +01:00
x86_64-cpuid-Xeon-W3520-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Xeon-W3520-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Xeon-W3520-json.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Xeon-W3520.json cputest: Drop .new suffix from CPU test data files 2017-03-03 19:57:57 +01:00
x86_64-cpuid-Xeon-W3520.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-W3520.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Xeon-X5460-guest.xml Do not format <arch> in guest CPU XML 2017-03-13 23:49:57 +01:00
x86_64-cpuid-Xeon-X5460-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-cpuid-Xeon-X5460.sig cputest: Test CPU signatures 2019-03-05 14:47:49 +01:00
x86_64-cpuid-Xeon-X5460.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact-disable2.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact-disable-extra.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact-disable.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact-forbid-extra.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact-forbid.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact-force-Haswell.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact-force.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact-require-extra.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact-require.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-exact.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-guest-nofallback.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-guest.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-Haswell-noTSX-nofallback.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-Haswell-noTSX.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-Haswell.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-amd-fake.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-amd.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-better.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-better+pentium3-result.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-Haswell-noTSX.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-Haswell-noTSX+Haswell-noTSX-result.xml conf: add support for specifying CPU "dies" parameter 2020-01-16 15:11:42 +00:00
x86_64-host-Haswell-noTSX+Haswell-noTSX,haswell-result.xml conf: add support for specifying CPU "dies" parameter 2020-01-16 15:11:42 +00:00
x86_64-host-Haswell-noTSX+Haswell,haswell-result.xml conf: add support for specifying CPU "dies" parameter 2020-01-16 15:11:42 +00:00
x86_64-host-incomp-arch.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-invtsc.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-invtsc+host-model.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-model-nofallback.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-model.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-no-vendor.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-passthrough-features.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-passthrough.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-SandyBridge.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-worse.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host-worse+guest-result.xml conf: add support for specifying CPU "dies" parameter 2020-01-16 15:11:42 +00:00
x86_64-host.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host+guest-result.xml conf: add support for specifying CPU "dies" parameter 2020-01-16 15:11:42 +00:00
x86_64-host+guest,model486-result.xml conf: add support for specifying CPU "dies" parameter 2020-01-16 15:11:42 +00:00
x86_64-host+guest,models-result.xml cpu_x86: Penalize disabled features when computing CPU model 2022-05-06 17:33:47 +02:00
x86_64-host+guest.xml conf: add support for specifying CPU "dies" parameter 2020-01-16 15:11:42 +00:00
x86_64-host+host-model-nofallback.xml conf: add support for specifying CPU "dies" parameter 2020-01-16 15:11:42 +00:00
x86_64-host+host-model.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host+host-passthrough-features.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host+host-passthrough.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host+host+host-model,models-result.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host+min.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host+penryn-force-result.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host+pentium3.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-host+strict-force-extra-result.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-min.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-penryn-force.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-pentium3-amd.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-pentium3.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-strict-disable.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-strict-force-extra.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-strict-full.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00
x86_64-strict.xml cputest: Rename x86 data files 2017-02-24 14:10:57 +01:00