Commit Graph

122 Commits

Author SHA1 Message Date
Wei Liu
2aaf0540b6 hypervisor: drop linux-loader dependency
It is not used anywhere inside the hypervisor crate.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-01-04 10:17:20 +00:00
Samuel Ortiz
21dcac7721 hypervisor: Bump iced-x86 to 1.10.0
And fix related warnings: op_kind and op_register are being deprecated
as they might panic.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2020-12-17 18:58:34 +00:00
Muminul Islam
8c85dd32fa hypervisor: Move msr and msr_data macro to arch/x86
Currently these two macros(msr, msr_data) reside both on kvm and mshv
module. Definition is same for both module. Moving them to arch/x86
module eliminates redundancy and makes more sense.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-11 00:59:46 +01:00
Muminul Islam
aac86f4523 hypervisor: Fix clippy errors in the mshv module
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-10 19:43:58 +00:00
Muminul Islam
ef3fad8388 hypervisor: mshv: Implement CPU state for MshvVcpu
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
2b42f6c835 hypervisor: mhsv: Implement CPU run loop
Handle CPU exits, adding instruction emulations.
Keep CPU specific data inside vmm for later use.

Co-Developed-by: Nuno Das Neves <nudasnev@microsoft.com>
Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>
Co-Developed-by: Praveen Paladugu <prapal@microsoft.com>
Signed-off-by: Praveen Paladugu <prapal@microsoft.com>
Co-Developed-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Co-Developed-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
7acb5c6437 hypervisor, mshv: Define MshvEmulatorContext
This patch adds the definition and implementation
MshvEmulatorContext which is platform emulation for Hyper-V.

Co-Developed-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Co-Developed-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
63f356b75b hypervisor: mhsv: Define software emulated TLB
A software emulated TLB. This is mostly used by
the instruction emulator to cache gva to gpa
translations passed from the hypervisor.

Co-Developed-by: Nuno Das Neves <nudasnev@microsoft.com>
Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>
Co-Developed-by: Praveen Paladugu <prapal@microsoft.com>
Signed-off-by: Praveen Paladugu <prapal@microsoft.com>
Co-Developed-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Co-Developed-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
fd0ef6cfb5 hypervisor: mshv: Emulate IrqFd and IOEventFd for mshv module
We don't have IrqFd and IOEventFd support in the kernel for now.
So an emulation layer is needed. In the future, we will be adding this
support in the kernel.

Co-Developed-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
286a23fbd4 hypervisor: mshv: Add vmmops to MshvVm struct
vmmops trait object is needed to get access some
of the upper level vmm functionalities i.e guest
memory access, IO read write etc.

Co-Developed-by: Praveen Paladugu <prapal@microsoft.com>
Signed-off-by: Praveen Paladugu <prapal@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
3a93487b82 hypervisor: mshv: Add Microsoft Hypervisor specific data to Mshv{Vm,Vcpu}
Adding hv_state (hyperv state) to Vm and Vcpu struct for mshv.
This state is needed to keep some kernel data(for now hypercall page)
in the vmm.

Co-Developed-by: Praveen Paladugu <prapal@microsoft.com>
Signed-off-by: Praveen Paladugu <prapal@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
23c46b162e hypervisor, vmm: Implement the mshv module and add mshv support in vmm
Implement hypervisor, Vm, Vcpu crate at a minimal
functionalities. Also adds the mshv feature gate,
separates out the functionalities between kvm and
mshv inside the vmm crate.

Co-Developed-by: Nuno Das Neves <nudasnev@microsoft.com>
Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>
Co-Developed-by: Praveen Paladugu <prapal@microsoft.com>
Signed-off-by: Praveen Paladugu <prapal@microsoft.com>
Co-Developed-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Co-Developed-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
f4af668d76 hypervisor, vmm: Implement MsiInterruptOps for mshv
Co-Developed-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
7fe5d276a3 hypervisor: mshv: Add x86_64 module
Add x86_64 specific definitions as we only plan
to support x86_64 for the moment.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
e664fa386b hypervisor: Modify toml file to add mshv-{bindings, ioctls) crates
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
9919dec1d9 hypervisor: Introduce mshv module in the hypervisor
This is the initial folder structure of the mshv module inside
the hypervisor crate. The aim of this module is to support Microsoft
Hyper-V as a supported Hypervisor.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
Muminul Islam
9ce6c3b75c hypervisor, vmm: Feature guard KVM specific code
There are some code base and function which are purely KVM specific for
now and we don't have those supports in mshv at the moment but we have plan
for the future. We are doing a feature guard with KVM. For example, KVM has
mp_state, cpu clock support,  which we don't have for mshv. In order to build
those code we are making the code base for KVM specific compilation.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2020-12-09 14:55:20 +01:00
dependabot-preview[bot]
b51f112629 build(deps): bump libc from 0.2.80 to 0.2.81
Bumps [libc](https://github.com/rust-lang/libc) from 0.2.80 to 0.2.81.
- [Release notes](https://github.com/rust-lang/libc/releases)
- [Commits](https://github.com/rust-lang/libc/compare/0.2.80...0.2.81)

Signed-off-by: dependabot-preview[bot] <support@dependabot.com>
2020-12-08 08:13:51 +00:00
Rob Bradford
9594ecec0d build: Only pull in iced-x86 for x86_64 builds
Fixes: #2024

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2020-12-07 17:42:42 +00:00
Wei Liu
6d38612f6c hypervisor: x86: move RFLAGS bits to regs.rs
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-12-07 14:35:35 +01:00
Wei Liu
a44d96c9cc hypervisor: emulator: switch to use vec in MockVMM
The customized hashmap macro can't be lifted to common MockVMM code.
MockVMM only needs a collection to iterate over to get initial register
states. A vector is just as good as a hashmap.

Switch to use a vector to store initial register states. This allows us
to drop the hashmap macro everywhere.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-12-07 14:35:35 +01:00
Wei Liu
93b7dcac12 hypervisor: emulator: emulate CMP
Unfortunately Rust stable does not yet have inline ASM support the flag
calculation will have to be implemented in software.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-12-07 14:35:35 +01:00
Wei Liu
dd3844a892 hypervisor: emulator: drop imm_op macro
It is not needed anymore.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-12-07 14:35:35 +01:00
Wei Liu
0c3ef986fa hypervisor: emulator: rewrite MOV emulation with get/set_op
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-12-07 14:35:35 +01:00
Wei Liu
53c3b00fb0 hypervisor: emulator: introduce get/set_op
Provide two helpers to get and set operands. This reduces repetition.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-12-07 14:35:35 +01:00
Rob Bradford
2cc312b65c build: Fix cargo fuzz build
Unfortunately it seems patch entries are ignored when obtaining
dependencies from another workspace.

Remove the problematic kvm-ioctls and kvm-bindings patch entries and use
the forked repository directly.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2020-12-04 11:38:44 +00:00
Wei Liu
90ae4676c8 hypervisor: x86: emulator: drop unneeded curly brackets
There is no need to have a pair of curly brackets for structures without
any member.

No functional change.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-12-03 14:52:00 +01:00
Wei Liu
c352b59857 hypervisor: emulator: drop InstructionMap
It is not needed anymore.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-12-02 19:45:36 +01:00
Wei Liu
ab89b48143 hypervisor: emulator: use static mapping to dispatch emulation
The mapping between code and its handler is static. We can drop the
HashMap in favour of a static match expression.

This has two benefits:
1. No more memory allocation and deallocation for the HashMap.
2. Shorter look-up time.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-12-02 19:45:36 +01:00
Rob Bradford
ffaab46934 misc: Use a more relaxed memory model when possible
When a total ordering between multiple atomic variables is not required
then use Ordering::Acquire with atomic loads and Ordering::Release with
atomic stores.

This will improve performance as this does not require a memory fence
on x86_64 which Ordering::SeqCst will use.

Add a comment to the code in the vCPU handling code where it operates on
multiple atomics to explain why Ordering::SeqCst is required.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2020-12-02 19:04:30 +01:00
Samuel Ortiz
15f0451c34 hypervisor: emulator: Format instructions on error paths
Formatting instructions might be costly, so we only want to do that on
the emulation error paths.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-12-01 11:13:54 +01:00
Samuel Ortiz
3fa6e17cc4 hypervisor: x86: Make imm_op available to all emulated instructions
By moving it to the instructions root module.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-12-01 11:13:54 +01:00
Wei Liu
e2c81f9ed8 hypervisor: x86: Extend the imm_op() macro
To support every kind of immediate operands.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-12-01 11:13:54 +01:00
Wei Liu
ba71390d6a hypervisor: drop arc-swap dependency
It is no longer needed after 0fec32658.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-11-30 16:47:32 +00:00
Samuel Ortiz
f6892f2ede hypervisor: emulator: Add a negative instruction fetch unit test
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-30 13:09:19 +00:00
Samuel Ortiz
251434862f hypervisor: emulator: Fix logic bug in MockVMM
emulate_first_insn() really means we want only the first instruction to
be emulated.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-30 13:09:19 +00:00
Samuel Ortiz
1ac4c42a84 hypervisor: emulator: Add initial fetch support
When the x86 instruction decoder tells us about some missing bytes from
the instruction stream, we call into the platform fetch method and
emulate one last instruction.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-30 13:09:19 +00:00
Samuel Ortiz
7dc92d1dac hypervisor: emulator: Decoding loop restructuring
In preparation for the instruction fetching step, we modify the decoding
loop so that we can check what the last decoding error is.

We also switch to explictly using decode_out() which removes a 32 bytes
copy compared to decode().

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-30 13:09:19 +00:00
Samuel Ortiz
7a4edecd29 hypervisor: x86: Add an address linearization method to CpuStateManager
From a CPU state and a segment, we can translate a logical (segmented)
address into a linear one.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-30 13:09:19 +00:00
Samuel Ortiz
d419e30df1 hypervisor: x86: Add a SegmentRegistorOps trait
In order to validate emulated memory accesses, we need to be able to get
all the segments descriptor attributes.

This is done by abstracting the SegmentRegister attributes through a
trait that each hypervisor will have to implement.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-30 13:09:19 +00:00
Samuel Ortiz
3faffcb087 hypervisor: emulator: Add a CPU mode getter to CpuStateManager
We need to be able to build the CPU mode from its state in order to
start implementing mode related checks in the x86 emulator.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-30 13:09:19 +00:00
Samuel Ortiz
b3a1f5f1be hypervisor: Start moving register definitions to the hypervisor crate
Most of arch/src/x86_64/regs.rs will eventually move unde
hypervisor/src/x86/regs.rs.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-30 13:09:19 +00:00
Samuel Ortiz
a3d957ba4d hypervisor: emulator: Clean the MockVMM initialization path
Separate the standalone _init_and_run() function into 2 MockVMM methods:
new() and emulate_insn().

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-27 19:17:35 +01:00
Samuel Ortiz
5bd63efa45 hypervisor: emulator: Move MockVMM into a shared test module
The MockVMM platform will be used by other instructions emulation
implementations, but also by the emulator framework.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-27 19:17:35 +01:00
Wei Liu
66b001665f hypervisor: x86: only calculate address when necessary in MOV emulation
Only calculate the address when the operand is memory.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-11-26 16:12:23 +01:00
Wei Liu
c6aea5af5d hypervisor: x86: drop an extraneous box indirection
There is no need to put a box into another box.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-11-26 12:02:47 +00:00
Wei Liu
c8b655490e hypervisor: x86: reference PlatformEmulator in Emulator
The observation here is PlatformEmulator can be seen as the context for
emulation to take place. It should be rather easy to construct a context
that satisfies the lifetime constraints for instruction emulation.

The thread doing the emulation will have full ownership over the
context, so this removes the need to wrap PlatformEmulator in Arc and
Mutex, as well as the need for the context to be either Clone or Copy.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-11-26 12:14:40 +01:00
Wei Liu
a6ad85dc40 hypervisor: x86: handle more registers in emulator
List all GPRs documented in Intel's SDM.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2020-11-25 20:18:40 +01:00
Samuel Ortiz
0f4f30dbde hypervisor: x86: Add MOV to the emulator instruction map
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-25 17:02:11 +01:00
Samuel Ortiz
fe5401223b hypervisor: x86: Emulate MOV
And add a few unit tests based on a Mock platform.

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-25 17:02:11 +01:00