Commit Graph

287 Commits

Author SHA1 Message Date
Wei Liu
45fbf840db hypervisor, vmm: move away from CpuId type
CpuId is an alias type for the flexible array structure type over
CpuIdEntry. The type itself and the type of the element in the array
portion are tied to the underlying hypervisor.

Switch to using CpuIdEntry slice or vector directly. The construction of
CpuId type is left to hypervisors.

This allows us to decouple CpuIdEntry from hypervisors more easily.

No functional change intended.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-18 22:15:30 +01:00
Wei Liu
edf6dda705 hypervisor: mshv: drop get_suspend_regs
It is not used (yet).

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-18 11:02:51 +01:00
Wei Liu
f1ab86fecb hypervisor: x86: provide a generic SpecialRegisters structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-15 10:21:43 +01:00
Wei Liu
d2b194c4f1 hypervisor: x86: provide a generic DescriptorTable structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-15 10:21:43 +01:00
Wei Liu
75797827d5 hypervisor: x86: provide a generic SegmentRegister structure
And drop SegmentRegisterOps since it is no longer required.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-15 10:21:43 +01:00
Wei Liu
8b7781e267 hypervisor: x86: provide a generic StandardRegisters structure
We only need to do this for x86 since MSHV does not have aarch64 support
yet. This reduces unnecessary code churn.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-15 10:21:43 +01:00
Wei Liu
d20f647b32 hypervisor: provide a generic IrqRoutingEntry structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-15 10:21:43 +01:00
Wei Liu
4201bf4011 hypervisor: provide a generic ClockData structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 22:09:04 +01:00
Wei Liu
beb4f86b82 hypervisor, vmm: drop VmState and code
VmState was introduced to hold hypervisor specific VM state. KVM does
not need it and MSHV does not really use it yet.

Just drop the code. It can be easily revived once there is a need.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 22:09:04 +01:00
Wei Liu
72d552e5e1 hypervisor: provide a generic CpuState structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 22:09:04 +01:00
Wei Liu
dd592e86fd hypervisor: do not export VcpuEvents
It is not used anywhere outside of the hypervisor crate.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 22:09:04 +01:00
Wei Liu
f9f0a60dcf hypervisor: provide a generic IoEventAddress structure
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 22:09:04 +01:00
Wei Liu
9810ed4496 hypervisor: provide a generic MpState structure
It is however only used for KVM right now because MSHV does not need it
yet.

Nonetheless a stub MSHV constructor should be there and get/set
functions should be implemented for MSHV.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 22:09:04 +01:00
Wei Liu
02866fccb0 hypervisor: drop unused IrqRouting struct from MSHV
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 22:09:04 +01:00
Wei Liu
4a1eab11b4 hypervisor: do not export VcpuExit
It is not used anywhere outside of the hypervisor crate.

Signed-off-by: Dev Rajput <t-devrajput@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 16:37:47 +01:00
Michael Zhao
f0ad7fc74f hypervisor: Remove arch_target = "arm"' in cfg`
Some `arch_target = "arm"' usages on VCPU related code are not correct.
And we don't support 32-bit ARM architecture.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-07-14 22:55:19 +08:00
Michael Zhao
2d8635f04a hypervisor: Refactor system_registers on AArch64
Function `system_registers` took mutable vector reference and modified
the vector content. Now change the definition to `get/set` style.
And rename to `get/set_sys_regs` to align with other functions.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-07-14 22:55:19 +08:00
Michael Zhao
c445513976 hypervisor: Refactor core_registers on AArch64
On AArch64, the function `core_registers` and `set_core_registers` are
the same thing of `get/set_regs` on x86_64. Now the names are aligned.
This will benefit supporting `gdb`.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-07-14 22:55:19 +08:00
Wei Liu
47b5581c50 hypervisor: drop a level of indirection for MSHV's DeviceFd
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 08:09:50 +01:00
Wei Liu
3710932248 hypervisor: drop a level of indirection for KVM's DeviceFd
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 08:09:50 +01:00
Wei Liu
ddad5f3510 hypervisor: allow downcasting to KVM / MSHV device fd
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 08:09:50 +01:00
Wei Liu
e1cf889dbd hypervisor: use UserMemoryRegion in the Vm trait
Signed-off-by: Dev Rajput <t-devrajput@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 07:55:48 +01:00
Wei Liu
5894b5370c hypervisor: transform between UserMemoryRegion and hypervisor structs
Signed-off-by: Dev Rajput <t-devrajput@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 07:55:48 +01:00
Wei Liu
fabc940b65 hypervisor: add UserMemoryRegion and flags
Signed-off-by: Dev Rajput <t-devrajput@microsoft.com>
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-14 07:55:48 +01:00
Wei Liu
84bbaf06d1 hypervisor: turn boot_msr_entries into a trait method
This allows dispatching to either KVM or MSHV automatically.

No functional change.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-07-08 16:49:58 +01:00
Rob Bradford
adf5881757 build: #[allow(clippy::significant_drop_in_scrutinee) in some crates
This check is new in the beta version of clippy and exists to avoid
potential deadlocks by highlighting when the test in an if or for loop
is something that holds a lock. In many cases we would need to make
significant refactorings to be able to pass this check so disable in the
affected crates.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-06-30 20:50:45 +01:00
Rob Bradford
2716bc3311 build: Fix beta clippy issue (derive_partial_eq_without_eq)
warning: you are deriving `PartialEq` and can implement `Eq`
  --> vmm/src/serial_manager.rs:59:30
   |
59 | #[derive(Debug, Clone, Copy, PartialEq)]
   |                              ^^^^^^^^^ help: consider deriving `Eq` as well: `PartialEq, Eq`
   |
   = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#derive_partial_eq_without_eq

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-06-30 20:50:45 +01:00
Wei Liu
2f514523dd hypervisor: emulator: use matches!
No functional change. Just make the code a bit nicer to read.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-06-23 17:30:21 +02:00
Wei Liu
a64bdcf3f5 hypervisor: drop Send+Sync bounds for PlatformEmulator
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-06-20 23:28:57 +01:00
Jinank Jain
ada85f68f6 hypervisor: mshv: Override hypervisor R/W behavior for unknown MSR
By default Microsoft Hypervisor send a GP to the guest if it tries
read/write an unimplemented MSR from the hypervisor prospective. Instead
change this behavior to ignore read/write operations for unimplemented
MSRs

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2022-06-09 20:53:58 +01:00
Michael Zhao
a7a15d56dd aarch64: Move setup_regs to hypervisor
`setup_regs` of AArch64 calls KVM sepecific code. Now move it to
`hypervisor` crate.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-06-06 11:07:46 +01:00
Michael Zhao
5d45d6d0fb vmm: Move GIC unit test to hypervisor crate
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-06-06 10:17:26 +08:00
Michael Zhao
957d3a7443 aarch64: Simplify GIC related structs definition
Combined the `GicDevice` struct in `arch` crate and the `Gic` struct in
`devices` crate.

After moving the KVM specific code for GIC in `arch`, a very thin wapper
layer `GicDevice` was left in `arch` crate. It is easy to combine it
with the `Gic` in `devices` crate.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-06-06 10:17:26 +08:00
Michael Zhao
b8dbb26647 hypervisor: Refactor save_pending_tables of Vgic
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-06-06 10:17:26 +08:00
Michael Zhao
3fe7d61a02 hypervisor: Remove some redundant parameters
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-06-06 10:17:26 +08:00
Michael Zhao
c2862b6947 hypervisor: Move GitV3Its code from arch
Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-06-06 10:17:26 +08:00
Michael Zhao
03b01c02cd hypervisor: Define Vgic trait
Defined `Vgic` trait as the hypervisor agnostic interface for a virtual
GIC.

Signed-off-by: Michael Zhao <michael.zhao@arm.com>
2022-06-06 10:17:26 +08:00
Maksym Pavlenko
3a0429c998 cargo: Clean up serde dependencies
There is no need to include serde_derive separately,
as it can be specified as serde feature instead.

Signed-off-by: Maksym Pavlenko <pavlenko.maksym@gmail.com>
2022-05-18 08:21:19 +02:00
Rob Bradford
8ab3aaee6a hypervisor: emulator: Remove some glob use imports
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-05-13 15:39:22 +02:00
Rob Bradford
218be2642e hypervisor: Explicitly pub use at the hypervisor crate top-level
Explicitly re-export types from the hypervisor specific modules. This
makes it much clearer what the common functionality that is exposed is.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-05-13 15:39:22 +02:00
Rob Bradford
4ff0686d37 hypervisor: mshv: Move CpuIdEntry alias into x86_64 module
This is consistent with kvm and correctly reflects the architectural
dependency.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-05-13 15:39:22 +02:00
Rob Bradford
288cea917e hypervisor: Make hypervisor module private
All the required functionality is already exported from the hypervisor
crate so for consistency make this module private.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-05-13 15:39:22 +02:00
Rob Bradford
d3f66f8702 hypervisor: Make vm module private
And thus only export what is necessary through a `pub use`. This is
consistent with some of the other modules and makes it easier to
understand what the external interface of the hypervisor crate is.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-05-13 15:39:22 +02:00
Rob Bradford
3ffc105f83 hypervisor, vm-device: Relocate InterruptSourceConfig
Move this enum from vm-device to hypervisor crate so that hypervisor
crate does not gain an extra dependency.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-05-11 11:19:14 +01:00
Rob Bradford
3f9e8d676a hypervisor: Move creation of irq routing struct to hypervisor crate
This removes the requirement to leak as many datastructures from the
hypervisor crate into the vmm crate.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-05-11 11:19:14 +01:00
Rob Bradford
387d56879b vmm, hypervisor: Clean up nomenclature around offloading VM operations
The trait and functionality is about operations on the VM rather than
the VMM so should be named appropriately. This clashed with with
existing struct for the concrete implementation that was renamed
appropriately.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-05-10 13:10:01 +01:00
Sebastien Boeuf
b0077f0b5e hypervisor: Implement retrieval of TDX capabilities
Extend the Hypervisor API in order to retrieve the TDX capabilities from
the underlying hypervisor.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-03-30 14:57:23 +01:00
Sebastien Boeuf
f310dc0916 hypervisor: Don't enable TDX debug
This might not be correctly supported, therefore best to keep it
disabled by default.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-03-30 14:57:23 +01:00
Wei Liu
0c4b28488c hypervisor: mshv: fix a comment
It should have said MSHV in the comment.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2022-03-20 11:37:13 +00:00
Akira Moroo
9f111388c0 hypervisor: Add VmExit::Debug for x86/KVM
This commit adds `VmExit::Debug` for x86/KVM. When the guest hits a
hardware breakpoint, `VcpuExit::Debug` vm exit occurs. This vm exit
will be handled with code implemented in the following commits.

Signed-off-by: Akira Moroo <retrage01@gmail.com>
2022-02-23 11:16:09 +00:00
Akira Moroo
9f27954fbd hypervisor: Add set_guest_debug for x86/KVM
This commit adds `set_guest_debug` implementation for x86/KVM. This
function sets hardware breakpoints and single step to debug registers.

NOTE: The `set_guest_debug` implementation is based on the crosvm
implementation [1].

[1]
https://github.com/google/crosvm/blob/main/hypervisor/src/kvm/x86_64.rs

Signed-off-by: Akira Moroo <retrage01@gmail.com>
2022-02-23 11:16:09 +00:00
Akira Moroo
603ca0e21b hypervisor: Add translate_gva for x86/KVM
This commit adds `translate_gva` for x86/KVM. The same name function is
already implemented for MSHV, but the implementation differs as
KVM_TRANSLATE does not take the flag argument and does not return status
code. This change requires the newer version of kvm-ioctls [1].

[1]
97ff779b6e

Signed-off-by: Akira Moroo <retrage01@gmail.com>
2022-02-23 11:16:09 +00:00
Akira Moroo
7c6bdf8804 hypervisor: Remove mshv specific type from translate_gva
`translate_gva` returns mshv-specific type `hv_translate_gva_result`.
This return type is not a problem since this function is implemented
only for mshv, but we need to remove the type as the same function will
be implemented for KVM in PR #3575. This commit replaces the
mshv-specific type with `u32`.

Signed-off-by: Akira Moroo <retrage01@gmail.com>
2022-02-23 11:16:09 +00:00
Sebastien Boeuf
cb844ecd1d hypervisor: Add support for TDX exit reason to KVM
Relying on the recent additions to the kvm-ioctls crate, this commit
implements the support for providing the exit reason details to the
caller, which allows the identification of the type of hypercall that
was issued. It also introduces a way for the consumer to set the status
code that must be sent back to the guest.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2022-02-18 14:41:07 +01:00
Rob Bradford
507912385a vmm: Ensure that PIO and MMIO exits complete before pausing
As per this kernel documentation:

      For KVM_EXIT_IO, KVM_EXIT_MMIO, KVM_EXIT_OSI, KVM_EXIT_PAPR, KVM_EXIT_XEN,
      KVM_EXIT_EPR, KVM_EXIT_X86_RDMSR and KVM_EXIT_X86_WRMSR the corresponding
      operations are complete (and guest state is consistent) only after userspace
      has re-entered the kernel with KVM_RUN.  The kernel side will first finish
      incomplete operations and then check for pending signals.

      The pending state of the operation is not preserved in state which is
      visible to userspace, thus userspace should ensure that the operation is
      completed before performing a live migration.  Userspace can re-enter the
      guest with an unmasked signal pending or with the immediate_exit field set
      to complete pending operations without allowing any further instructions
      to be executed.

Since we capture the state as part of the pause and override it as part
of the resume we must ensure the state is consistent otherwise we will
lose the results of the MMIO or PIO operation that caused the exit from
which we paused.

Fixes: #3658

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-02-07 15:26:22 +00:00
Jianyong Wu
9bcb984962 hypervisor: add has/set trait for vcpu
Like devicefd, vcpufd also has ability to set/has attribute through kvm
ioctl. These traits are used when enable PMU on arm64, so add it here.

Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>
2022-01-21 17:59:36 +08:00
Rob Bradford
658658e76c hypervisor: kvm: Ignore -EINVAL from KVM_KVMCLOCK_CTRL ioctl()
If the guest hasn't initialised a PV clock then the KVM_KVMCLOCK_CTRL
ioctl will return -EINVAL. Therefore if running in the firmware or an OS
that doesn't use the PV clock then we should ignore that error

Tested by migrating a VM that has not yet booted into the Linux kernel
(just in firmware) by specifying no disk image:

e.g. target/debug/cloud-hypervisor --kernel ~/workloads/hypervisor-fw --api-socket /tmp/api --serial tty --console off

Fixes: #3586

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-01-19 10:12:57 +01:00
Rob Bradford
0a97b76c52 hypervisor: mshv: Fix beta clippy issue
error: this boolean expression can be simplified
   --> hypervisor/src/mshv/mod.rs:348:25
    |
348 |                         !(unsafe { access_info.__bindgen_anon_1.string_op() } == 1),
    |                         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: try: `unsafe { access_info.__bindgen_anon_1.string_op() } != 1`
    |
    = note: `-D clippy::nonminimal-bool` implied by `-D warnings`
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#nonminimal_bool

error: this boolean expression can be simplified
   --> hypervisor/src/mshv/mod.rs:352:25
    |
352 |                         !(unsafe { access_info.__bindgen_anon_1.rep_prefix() } == 1),
    |                         ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ help: try: `unsafe { access_info.__bindgen_anon_1.rep_prefix() } != 1`
    |
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#nonminimal_bool

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-01-14 14:33:18 +00:00
Sebastien Boeuf
c452471c4e hypervisor: Add support for setting KVM identity map
Extending the Vm trait with set_identity_map_address() in order to
expose this ioctl to the VMM.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-12-04 19:33:34 +00:00
Rob Bradford
348def9dfb arch, hypervisor, vmm: Explicitly place the TSS in the 32-bit space
Place the 3 page TSS at an explicit location in the 32-bit address space
to avoid conflicting with the loaded raw firmware.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-12-03 16:53:56 +01:00
Wei Liu
58d984f6b8 hypervisor: add a few safety comments
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-11-18 14:42:55 +00:00
Wei Liu
dd3c086a0a hypervisor: drop one unsafe from mock_vmm
Simple aggregate types are Sync by default. There is no need to use
`impl Sync` for MockVmm (a simple struct).

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-11-18 14:42:55 +00:00
Wei Liu
6221b6f8a1 hypervisor: aarch64: move a comment to where it should be
No functional change.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-11-16 10:13:09 +08:00
Wei Liu
57cc8bc6fe hypervisor: aarch64: remove undefined behaviour in offset__of
The variable tmp was never initialized. Calling assume_init when the
content is not yet initialized causes immediate undefined behaviour.

We also cannot create any intermediate references because they will be
subject to the same requirements for references -- the referred object
must be valid.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-11-16 10:13:09 +08:00
Rob Bradford
70f9fea1c3 hypervisor: aarch64: Use assert!() rather than if+panic
As identified by the new beta clippy.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-10-19 19:42:36 +01:00
Rob Bradford
2f57d1c3f9 hypervisor: mshv: Use assert!() rather than if+panic
As identified by the new beta clippy.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-10-19 19:42:36 +01:00
Rob Bradford
7d7577007a hypervisor: emulator: Print out all exception details
Print out all the details from an emulator exception.

As identified by the new beta clippy.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-10-19 19:42:36 +01:00
Muminul Islam
c3d6aceed1 hypervisor: Add Misc register to Save/Restore state for MSHV
Hypercall register needs to be saved and restored for
TLB flush and IPI synthetic features enablement.
Enabling these two synthetic features improves
guest performance.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-10-15 14:54:02 -07:00
Sebastien Boeuf
76a036e96d hypervisor: kvm: Add missing MSR related to Hyper-V
When the synthetic interrupt controller is enabled, an extra set of MSRs
must be stored in case of migration. There was one MSR missing in the
list, HV_X64_MSR_SINT14 corresponding to the 15th interrupt source from
the synthetic interrupt controller.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-10-11 15:30:13 +02:00
Wei Liu
86afa38c64 hypervisor: mshv: drop one unsafe in code
The binding already provides a default() method which does the same
thing.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-09-20 17:22:31 +02:00
Sebastien Boeuf
bcdac10149 deps: Bump kvm-bindings to v0.5.0
Update the kvm-bindings dependency so that Cloud Hypervisor now depends
on the version 0.5.0, which is based on Linux kernel v5.13.0. We still
have to rely on a forked version to be able to serialize all the KVM
structures we need.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-09-15 16:20:17 +01:00
Wei Liu
9c5b404415 vmm: MSHV now supports VFIO-based device passthrough
Drop a few feature gates and adjust code a bit.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-09-07 15:17:08 +01:00
Wei Liu
6e9d3eccd6 hypervisor: implement devicefd management for MSHV
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-09-07 15:17:08 +01:00
Henry Wang
d74a219add hypervisor: Remove useless check when saving Arm SystemRegs
Signed-off-by: Henry Wang <Henry.Wang@arm.com>
2021-08-31 09:53:57 +02:00
Jiaqi Gao
a90260ffb6 hypervisor: kvm: Update TDX command INIT_VM
Definition of kvm_tdx_init_vm used by INIT_VM has been updated in latest
kernel, needing an update on the Cloud Hypervisor side as well.

Update structure TdxInitVm to fit this change and avoid -EINVAL to be
returned by the kernel.

Signed-off-by: Jiaqi Gao <jiaqi.gao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-08-30 10:24:37 -07:00
Muminul Islam
81895b9b40 hypervisor: Implement start/stop_dirty_log for MSHV
This patch modify the existing live migration code
to support MSHV. Adds couple of new functions to enable
and disable dirty page tracking. Add missing IOCTL
to the seccomp rules for live migration.
Adds necessary flags for MSHV.
This changes don't affect KVM functionality at all.

In order to get better performance it is good to
enable dirty page tracking when we start live migration
and disable it when the migration is done.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-07-29 16:29:53 +01:00
Muminul Islam
6492496cc2 hypervisor: Keep track of dirty memory slots for MSHV
Keep the memory slots for enabling/disabling
dirty page tracking on MSHV.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-07-29 16:29:53 +01:00
Muminul Islam
fdecba6958 hypervisor: MSHV needs gpa to retrieve dirty logs
Right now, get_dirty_log API has two parameters,
slot and memory_size.
MSHV needs gpa to retrieve the page states. GPA is
needed as MSHV returns the state base on PFN.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-07-29 16:29:53 +01:00
Sebastien Boeuf
dcc646f5b1 clippy: Fix redundant allocations
With the new beta version, clippy complains about redundant allocation
when using Arc<Box<dyn T>>, and suggests replacing it simply with
Arc<dyn T>.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-07-29 13:28:57 +02:00
Bo Chen
e7c9954dc1 hypervisor, vmm: Abstract the interfaces to start/stop dirty log
Following KVM interfaces, the `hypervisor` crate now provides interfaces
to start/stop the dirty pages logging on a per region basis, and asks
its users (e.g. the `vmm` crate) to iterate over the regions that needs
dirty pages log. MSHV only has a global control to start/stop dirty
pages log on all regions at once.

This patch refactors related APIs from the `hypervisor` crate to provide
a global control to start/stop dirty pages log (following MSHV's
behaviors), and keeps tracking the regions need dirty pages log for
KVM. It avoids leaking hypervisor-specific behaviors out of the
`hypervisor` crate.

Signed-off-by: Bo Chen <chen.bo@intel.com>
2021-07-28 09:08:32 -07:00
Bo Chen
5e0d498582 hypervisor, vmm: Add dynamic control of logging dirty pages
This patch extends slightly the current live-migration code path with
the ability to dynamically start and stop logging dirty-pages, which
relies on two new methods added to the `hypervisor::vm::Vm` Trait. This
patch also contains a complete implementation of the two new methods
based on `kvm` and placeholders for `mshv` in the `hypervisor` crate.

Fixes: #2858

Signed-off-by: Bo Chen <chen.bo@intel.com>
2021-07-26 09:19:35 -07:00
Sebastien Boeuf
9ec0c981f8 hypervisor: Add enable_sgx_attribute to the Vm API
We need a dedicated function to enable the SGX attribute capability
through the Hypervisor abstraction.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2021-07-07 14:56:38 +02:00
Wei Liu
1f2915bff0 vmm: hypervisor: split set_user_memory_region to two functions
Previously the same function was used to both create and remove regions.
This worked on KVM because it uses size 0 to indicate removal.

MSHV has two calls -- one for creation and one for removal. It also
requires having the size field available because it is not slot based.

Split set_user_memory_region to {create/remove}_user_memory_region. For
KVM they still use set_user_memory_region underneath, but for MSHV they
map to different functions.

This fixes user memory region removal on MSHV.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-07-05 09:45:45 +02:00
Muminul Islam
e214bb9eed hypervisor: implement Display for MSHV VcpuState
This functionality is useful for Snapshot/Restore debugging.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-06-24 09:02:36 -07:00
Muminul Islam
5cd82cb2e2 hypervisor: implement get_suspend_regs for MSHV vcpu trait
This vcpu API is necessary for MSHV related debugging.
These two registers controls the vcpu_run in the
/dev/mshv driver code.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-06-24 09:02:36 -07:00
Bo Chen
5825ab2dd4 clippy: Address the issue 'needless-borrow'
Issue from beta verion of clippy:

Error:    --> vm-virtio/src/queue.rs:700:59
    |
700 |             if let Some(used_event) = self.get_used_event(&mem) {
    |                                                           ^^^^ help: change this to: `mem`
    |
    = note: `-D clippy::needless-borrow` implied by `-D warnings`
    = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#needless_borrow

Signed-off-by: Bo Chen <chen.bo@intel.com>
2021-06-24 08:55:43 +02:00
Muminul Islam
5432cbfaad hypervisor: Set MTRRdefType in MSHV guest initialization to enable cpu caching
Initialize MTRR defType register the same way the KVM code does - WB caching by default.
Tested with latest mshv code.

Without this patch, these lines are present in guest serial log:
[ 0.000032] x86/PAT: MTRRs disabled, skipping PAT initialization too.
[ 0.000036] CPU MTRRs all blank - virtualized system.
This indicates the guest is detecting the set MTRR.

Signed-off-by: Nuno Das Neves <nudasnev@microsoft.com>
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-06-23 17:44:24 +01:00
Muminul Islam
652e30c97d hypervisor: Fix clippy error on MSHV
This patch addresses this issue https://github.com/rust-lang/rust-bindgen/pull/2064.
While we access field of packed struct the compiler can generate the
correct code to create a temporary variable to access the packed struct
field. Access withing {} ensures that.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-06-22 10:37:28 -07:00
Muminul Islam
49e061d15b hypervisor: Fix hv_translate_gva_result_code with correct value
Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-06-22 10:37:28 -07:00
Henry Wang
2fe3586eba hypervisor: support AArch64 get_host_ipa_limit
Not all AArch64 platforms support IPAs up to 40 bits. Since the
kvm-ioctl crate now supports `get_host_ipa_limit` for AArch64,
when creating the VM, it is better to get the IPA size from the
host and use that to create the VM.

Signed-off-by: Henry Wang <Henry.Wang@arm.com>
2021-06-10 12:06:17 +02:00
Henry Wang
805cb303d5 hypervisor: Add get_host_ipa_limit for AArch64
This commit adds a helper `get_host_ipa_limit` to the AArch64
`KvmHypervisor` struct. This helper can be used to get the
`Host_IPA_Limit`, which is the maximum possible value for
IPA_Bits on the host and is dependent on the CPU capability
and the kernel configuration.

Signed-off-by: Henry Wang <Henry.Wang@arm.com>
2021-06-10 12:06:17 +02:00
Wei Liu
c419d3286b hypervisor: emulator: emulate OR instruction
Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-06-07 11:54:57 -07:00
Wei Liu
d76743ed0b hypervisor: x86: make debug output more useful
The debug output should show the range of memory read from / written to.

Signed-off-by: Wei Liu <liuwe@microsoft.com>
2021-06-07 11:54:57 -07:00
Muminul Islam
c7b794a7c5 hypervisor: Fix MSHV set_xsave API call
MSHV set_xsave got changed to fix the Snapshot and restore issue.
This patch fixes the API call.

Signed-off-by: Muminul Islam <muislam@microsoft.com>
2021-06-03 08:30:50 +01:00
Rob Bradford
9f5325fd52 hypervisor: tdx: Unconditionally enable TDX debug
For now enable the TDX attribute for TDX debug.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-06-01 09:50:22 -07:00
Rob Bradford
84454f142d hypervisor: Remove panic from Hypervisor::check_required_extensions()
Remove the panic by replacing the .expect() with a cleaner error
handling.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-05-19 17:11:30 +02:00
Rob Bradford
a335cbb8d5 hypervisor: Unconditional build Hypervisor::create_vm_with_type()
Mark it as unreachable for now in the default implementation as this is
currently only used on tdx code path which is KVM only.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-05-19 17:11:30 +02:00
Rob Bradford
0cf9218d3f hypervisor, vmm: Add default Hypervisor::check_required_extensions()
This allows the removal of KVM specific compile time checks on this
function.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-05-19 17:11:30 +02:00
Rob Bradford
2439625785 hypervisor: Cleanup unused Hypervisor trait members
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-05-19 17:11:30 +02:00
Rob Bradford
496ceed1d0 misc: Remove unnecessary "extern crate"
Now all crates use edition = "2018" then the majority of the "extern
crate" statements can be removed. Only those for importing macros need
to remain.

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2021-05-12 17:26:11 +02:00