cloud-hypervisor/hypervisor/src/mshv
Jinank Jain 719cae217e hypervisor: mshv: Restrict MSR and CPUID visbility for MshvVcpu to x86
MSR and CPUID are limited to x86 architecture so, reduce the visbility
of these two members inside struct MshvVcpu to just x86 architecture.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2024-03-20 09:49:48 +00:00
..
x86_64 hypervisor: simplify LapicState 2022-07-28 08:52:28 +01:00
mod.rs hypervisor: mshv: Restrict MSR and CPUID visbility for MshvVcpu to x86 2024-03-20 09:49:48 +00:00
snp_constants.rs hypervisor: Add support for legacy I/O port emulation 2023-10-30 10:23:52 -07:00