Commit Graph

156 Commits

Author SHA1 Message Date
Jiri Denemark
9cd03f7957 cpu_map: Drop pconfig from Icelake-Server CPU model
The pconfig feature was enabled in QEMU by accident in 3.1.0. All other
newer versions do not support it and it was removed from the
Icelake-Server CPU model in QEMU.

We don't normally change our CPU models even when QEMU does so to avoid
breaking migrations between different versions of libvirt. But we can
safely do so in this specific case. QEMU never supported enabling
pconfig so any domain which was able to start has pconfig disabled.

With a small compatibility hack which explicitly disables pconfig when
CPU model equals Icelake-Server in migratable domain definition, only
one migration scenario stays broken (and there's nothing we can do about
it): from any host to a host with libvirt < 5.10.0 and QEMU > 3.1.0.

https://bugzilla.redhat.com/show_bug.cgi?id=1749672

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2019-11-12 20:14:16 +01:00
Jiri Denemark
6b4cc15730 cputest: Add data for Ice Lake Server CPU
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2019-11-12 20:14:16 +01:00
Daniel P. Berrangé
43d29cb40b python: sanitize spaces either side of operators
There should be a single space either side of operators. Inline
comments should have two spaces before the '#'

src/hyperv/hyperv_wmi_generator.py:130:45: E261 at least two spaces before inline comment
            source += '    { "", "", 0 },\n' # null terminated
                                            ^
src/esx/esx_vi_generator.py:417:25: E221 multiple spaces before operator
    FEATURE__DESERIALIZE  = (1 << 6)
                        ^
tests/cputestdata/cpu-cpuid.py:187:78: E225 missing whitespace around operator
                f.write("  <msr index='0x%x' edx='0x%08x' eax='0x%08x'/>\n" %(
                                                                             ^
docs/apibuild.py:524:47: E226 missing whitespace around arithmetic operator
                            self.line = line[i+2:]
                                              ^
...more...

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2019-11-11 14:24:19 +00:00
Daniel P. Berrangé
bc59247df9 python: sanitize blank line usage
Coding style expects 1 blank line between each method and 2 blank lines
before each class.

docs/apibuild.py:171:5: E303 too many blank lines (2)
    def set_header(self, header):
    ^
docs/apibuild.py:230:1: E302 expected 2 blank lines, found 1
class index:
^
docs/apibuild.py:175:5: E301 expected 1 blank line, found 0
    def set_module(self, module):
    ^
...more...

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2019-11-11 14:24:19 +00:00
Jiri Denemark
c8ec678fd9 cpu_map: Introduce IA32_ARCH_CAPABILITIES MSR features
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-06-20 14:02:36 +02:00
Jiri Denemark
538d873571 cpu_map: Define md-clear CPUID bit
CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091

The bit is set when microcode provides the mechanism to invoke a flush
of various exploitable CPU buffers by invoking the VERW instruction.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2019-05-14 19:33:37 +02:00
Jiri Denemark
5cd9db3ac1 cputest: Add data for Intel(R) Xeon(R) CPU E3-1225 v5
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2019-05-14 19:33:37 +02:00
Jiri Denemark
1c0ff5df07 cputest: Add support for MSR features to cpu-cpuid.py
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:40 +02:00
Jiri Denemark
8904492e21 cputest: Add support for MSR features to cpu-parse.sh
The script just parses whatever cpu-gather.sh printed out.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
ab3d6ea0da cputest: Add support for MSR features to cpu-gather.sh
This patch adds an inline python code for reading MSR features. Since
reading MSRs is a privileged operation, we have to read them from
/dev/cpu/*/msr if it is readable (i.e., the script runs as root) or
fallback to using KVM ioctl which can be done by any user that can start
virtual machines.

The python code is inlined rather than provided in a separate script
because whenever there's an issue with proper detection of CPU features,
we ask the reporter to run cpu-gather.sh script to give us all data we
need to know about the host CPU. Asking them to run several scripts
would likely result in one of them being ignored or forgotten.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
4dbb82a967 cputest: Generalize feature parsing in cpu-cpuid.py
The parseMapFeature for parsing features from CPU map XML can be easily
generalized to support more feature types.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
df9a23beee cputest: Prepare cpu-cpuid.py for MSR features
Let's make sure the current CPUID specific code is only applied to CPUID
features.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
6cbab502d3 cputest: Rename in_e[ac]x as e[ac]x_in in cpu-cpuid.py
This will let us simplify the code since the dictionary keys will match
attribute names in various XMLs.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
77f1fbaed8 cputest: Fix comparison in checkCPUIDFeature in cpu-cpuid.py
leaf["eax"] & eax > 0 check works correctly only if there's at most 1
bit set in eax. Luckily that's been always the case, but fixing this
could save us from future surprises.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
a7ad56edd9 cputest: Generalize function names in cpu-cpuid.py
The function will have to deal with both CPUID and MSR features.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
ee6185db02 cputest: Drop support for old QEMU from cpu-parse.sh
We don't really need to parse CPU data from QEMU older than 2.9 (i.e.,
before query-cpu-model-expansion) at this point. But even if there's a
need to do so, we can always use an older version of this script to do
the conversion.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
fcf4846a6b cpu_x86: Add support for storing MSR features in CPU map
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
2878278c74 cpu_map: Add Cascadelake-Server CPU model
Introduced in QEMU 3.1.0 by commit
c7a88b52f62b30c04158eeb07f73e3f72221b6a8

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
e024625735 cputest: Add data for Intel(R) Xeon(R) Platinum 8268 CPU
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-04-12 22:53:39 +02:00
Jiri Denemark
4ff74a806a cpu_map: Add more signatures for Broadwell CPU models
This fixes several CPUs which were incorrectly detected as
Skylake-Client.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-03-05 14:47:49 +01:00
Jiri Denemark
e89f877214 cpu_map: Add more signatures for Westmere CPU model
This fixes several CPUs which were incorrectly detected as a different
CPU model.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-03-05 14:47:49 +01:00
Jiri Denemark
dd08d27fc2 cputest: Test CPU signatures
The signature computation code is not too complicated and it will likely
never change so testing it is not very important. We do it mostly for a
nice side effect of easily accessible signature numbers for all CPU
data files.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-03-05 14:47:49 +01:00
Jiri Denemark
87a46f5d8f cputest: Add data for Intel(R) Core(TM) i7-8700
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-03-05 14:38:35 +01:00
Jiri Denemark
483679d48f cputest: Add data for Intel(R) Xeon(R) CPU E5-2650
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-03-05 14:38:03 +01:00
Jiri Denemark
60046a2365 cputest: Add data for Intel(R) Xeon(R) CPU E7540
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-03-05 14:38:03 +01:00
Jiri Denemark
cd11ea73d0 cputest: Add data for Intel(R) Core(TM) i7-7600U
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-03-05 14:38:03 +01:00
Jiri Denemark
8d068f3601 cputest: Add data for Intel(R) Xeon(R) CPU E5-2630 v4
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-03-05 14:38:03 +01:00
Jiri Denemark
dd7682dd12 cputest: Make sure generated files pass syntax-check
The tests/cputestdata/cpu-parse.sh would produce JSON files with QEMU
replies which wouldn't pass syntax-check. Let's fix this by not emitting
an extra new line after reformatting the JSON file.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-03-05 14:38:03 +01:00
Jiri Denemark
ac5d4e6cb0 cputest: Use python3 in CPU parser scripts
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-02-22 18:41:19 +01:00
Jiri Denemark
78b148c3c8 cputest: Adapt scripts to split cpu_map
The tests/cputestdata/cpu-parse.sh script has been broken since the
cpu_map.xml file was split into several XMLs.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-02-22 18:41:19 +01:00
Jiri Denemark
511df17aec cpu_map: Add support for arch-capabilities feature
The feature was added to QEMU in 3.1.0 and it is currently blocking
migration, which is expected to change in the future. Luckily 3.1.0 is
new enough to give us migratability hints on each feature via
query-cpu-model-expension, which means we don't need to use the
"migratable" attribute on the CPU map XML.

The kernel calls this feature arch_capabilities and RHEL/CentOS 7.* use
arch-facilities. Apparently some CPU test files were gathered with the
RHEL version of QEMU. Let's update the test files to avoid possible
confusion about the correct naming.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2019-01-10 16:39:57 +01:00
Jiri Denemark
eb1b551d21 cpu: Add support for "stibp" x86_64 feature
QEMU commit v3.1.0-4-g0e89165829
KVM patch: https://lore.kernel.org/lkml/20181205191956.31480-1-ehabkost@redhat.com/

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
2018-12-17 17:27:32 +01:00
Jiri Denemark
9813081119 cpu_map: Add features for Icelake CPUs
QEMU commits:

    e37a5c7fa4 (v2.12.0)
        i386: Add Intel Processor Trace feature support

    c2f193b538 (v2.7.0)
        target-i386: Add support for UMIP and RDPID CPUID bits

    aff9e6e46a (v2.12.0)
        x86/cpu: Enable new SSE/AVX/AVX512 cpu features

    f77543772d (v2.9.0)
        x86: add AVX512_VPOPCNTDQ features

    5131dc433d (v3.1.0)
        i386: Add CPUID bit for PCONFIG

    59a80a19ca (v3.1.0)
        i386: Add CPUID bit for WBNOINVD

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2018-09-19 14:05:59 +02:00
Nikolay Shirokovskiy
0c8f0fb653 cputest: New test for Intel Core i5-650
Signed-off-by: Nikolay Shirokovskiy <nshirokovskiy@virtuozzo.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2018-04-18 11:39:53 +02:00
Radostin Stoyanov
d65f487a91 python3: cpu-reformat: Use the print() function
Replace the print statement, that is only available in Py2, with a
print function that is available in both Py2 and Py3 and drop the
explicit python version in the shebang.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Radostin Stoyanov <rstoyanov1@gmail.com>
2018-03-20 12:13:36 +00:00
Radostin Stoyanov
5e870cbda4 python: Remove space around = in keyword args
PEP8 recommends not having spaces around = in a keyword argument or
a default parameter value.

https://www.python.org/dev/peps/pep-0008/#other-recommendations

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Radostin Stoyanov <rstoyanov1@gmail.com>
2018-03-20 12:13:35 +00:00
Radostin Stoyanov
293bb82b58 python: Add whitespace around = and % operators
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Radostin Stoyanov <rstoyanov1@gmail.com>
2018-03-20 12:13:35 +00:00
Jiri Denemark
6d4a3cd427 cpu: Add EPYC-IBPB CPU model
This is a variant of EPYC with indirect branch prediction protection.
The only difference between EPYC and EPYC-IBPB is the added "ibpb"
feature.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-18 15:04:18 +01:00
Jiri Denemark
24d504396c cpu: Add Skylake-Server-IBRS CPU model
This is a variant of Skylake-Server with indirect branch prediction
protection. The only difference between Skylake-Server and
Skylake-Server-IBRS is the added "spec-ctrl" feature.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:04 +01:00
Jiri Denemark
b2042020c3 cpu: Add Skylake-Client-IBRS CPU model
This is a variant of Skylake-Client with indirect branch prediction
protection. The only difference between Skylake-Client and
Skylake-Client-IBRS is the added "spec-ctrl" feature.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:04 +01:00
Jiri Denemark
7bb4ce9761 cpu: Add Broadwell-IBRS CPU model
This is a variant of Broadwell with indirect branch prediction
protection. The only difference between Broadwell and Broadwell-IBRS is
the added "spec-ctrl" feature.

The Broadwell-IBRS model in QEMU is a bit different since Broadwell got
several additional features since we added it in cpu_map.xml:
    abm, arat, f16c, rdrand, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:04 +01:00
Jiri Denemark
7dd85ff62d cpu: Add Haswell-noTSX-IBRS CPU model
This is a variant of Haswell-noTSX with indirect branch prediction
protection. The only difference between Haswell-noTSX and
Haswell-noTSX-IBRS is the added "spec-ctrl" feature.

The Haswell-noTSX-IBRS model in QEMU is a bit different since
Haswell-noTSX got several additional features since we added it in
cpu_map.xml:
    arat, abm, f16c, rdrand, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:03 +01:00
Jiri Denemark
edcab4d0a4 cputest: Add data for updated Intel(R) Core(TM) i7-5600U CPU
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
32e348be6b cputest: Add data for updated AMD EPYC 7601 32-Core Processor
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
e68ffa5164 cputest: Add data for Intel(R) Xeon(R) Gold 5115 CPU
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
69e4eb047f cputest: Add data for Intel(R) Xeon(R) CPU E5-2623 v4
The CPU contains the updated microcode for CVE-2017-5715.

The *-guest.xml and *-json.xml CPU definitions use Skylake-Client CPU
model rather than Broadwell. This is similar to Xeon-E5-2650-v4 and it
is caused by our CPU model selection code when no model matches the CPU
signature (family + model). We'd need to maintain a complete list of CPU
signatures for our CPU models to fix this.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
181acabef9 cputest: Add data for Intel(R) Xeon(R) CPU E5-2609 v3
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
5ea187bc83 cputest: Fix cpu-cpuid.py diff command
The cpuidMap in cpu-cpuid.py was created for converting old data files
(with QEMU's feature-words bits) to the new model-expansion based data.
When I added tests for CPU live update based on disabled/enabled feature
lists I shamelessly used the existing cpuidMap for generating the
*-{enabled,disabled}.xml data files. Thus any new CPUID bits which are
not present in the original cpuidMap would be ignored. The correct thing
to do is to use cpu_map.xml.

All data files were fixed by running the following command:

    ./cpu-cpuid.py diff *.json

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-10 11:07:23 +01:00
Jiri Denemark
4ca81baa23 cputest: Add data for Intel(R) Core(TM) i7-7700 CPU
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-11-07 23:40:47 +01:00
Jiri Denemark
d85ae683e5 cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 v4
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-11-07 23:40:47 +01:00