Commit Graph

123 Commits

Author SHA1 Message Date
Nikolay Shirokovskiy
0c8f0fb653 cputest: New test for Intel Core i5-650
Signed-off-by: Nikolay Shirokovskiy <nshirokovskiy@virtuozzo.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2018-04-18 11:39:53 +02:00
Radostin Stoyanov
d65f487a91 python3: cpu-reformat: Use the print() function
Replace the print statement, that is only available in Py2, with a
print function that is available in both Py2 and Py3 and drop the
explicit python version in the shebang.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Radostin Stoyanov <rstoyanov1@gmail.com>
2018-03-20 12:13:36 +00:00
Radostin Stoyanov
5e870cbda4 python: Remove space around = in keyword args
PEP8 recommends not having spaces around = in a keyword argument or
a default parameter value.

https://www.python.org/dev/peps/pep-0008/#other-recommendations

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Radostin Stoyanov <rstoyanov1@gmail.com>
2018-03-20 12:13:35 +00:00
Radostin Stoyanov
293bb82b58 python: Add whitespace around = and % operators
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Radostin Stoyanov <rstoyanov1@gmail.com>
2018-03-20 12:13:35 +00:00
Jiri Denemark
6d4a3cd427 cpu: Add EPYC-IBPB CPU model
This is a variant of EPYC with indirect branch prediction protection.
The only difference between EPYC and EPYC-IBPB is the added "ibpb"
feature.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-18 15:04:18 +01:00
Jiri Denemark
24d504396c cpu: Add Skylake-Server-IBRS CPU model
This is a variant of Skylake-Server with indirect branch prediction
protection. The only difference between Skylake-Server and
Skylake-Server-IBRS is the added "spec-ctrl" feature.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:04 +01:00
Jiri Denemark
b2042020c3 cpu: Add Skylake-Client-IBRS CPU model
This is a variant of Skylake-Client with indirect branch prediction
protection. The only difference between Skylake-Client and
Skylake-Client-IBRS is the added "spec-ctrl" feature.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:04 +01:00
Jiri Denemark
7bb4ce9761 cpu: Add Broadwell-IBRS CPU model
This is a variant of Broadwell with indirect branch prediction
protection. The only difference between Broadwell and Broadwell-IBRS is
the added "spec-ctrl" feature.

The Broadwell-IBRS model in QEMU is a bit different since Broadwell got
several additional features since we added it in cpu_map.xml:
    abm, arat, f16c, rdrand, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:04 +01:00
Jiri Denemark
7dd85ff62d cpu: Add Haswell-noTSX-IBRS CPU model
This is a variant of Haswell-noTSX with indirect branch prediction
protection. The only difference between Haswell-noTSX and
Haswell-noTSX-IBRS is the added "spec-ctrl" feature.

The Haswell-noTSX-IBRS model in QEMU is a bit different since
Haswell-noTSX got several additional features since we added it in
cpu_map.xml:
    arat, abm, f16c, rdrand, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:03 +01:00
Jiri Denemark
edcab4d0a4 cputest: Add data for updated Intel(R) Core(TM) i7-5600U CPU
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
32e348be6b cputest: Add data for updated AMD EPYC 7601 32-Core Processor
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
e68ffa5164 cputest: Add data for Intel(R) Xeon(R) Gold 5115 CPU
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
69e4eb047f cputest: Add data for Intel(R) Xeon(R) CPU E5-2623 v4
The CPU contains the updated microcode for CVE-2017-5715.

The *-guest.xml and *-json.xml CPU definitions use Skylake-Client CPU
model rather than Broadwell. This is similar to Xeon-E5-2650-v4 and it
is caused by our CPU model selection code when no model matches the CPU
signature (family + model). We'd need to maintain a complete list of CPU
signatures for our CPU models to fix this.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
181acabef9 cputest: Add data for Intel(R) Xeon(R) CPU E5-2609 v3
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00
Jiri Denemark
5ea187bc83 cputest: Fix cpu-cpuid.py diff command
The cpuidMap in cpu-cpuid.py was created for converting old data files
(with QEMU's feature-words bits) to the new model-expansion based data.
When I added tests for CPU live update based on disabled/enabled feature
lists I shamelessly used the existing cpuidMap for generating the
*-{enabled,disabled}.xml data files. Thus any new CPUID bits which are
not present in the original cpuidMap would be ignored. The correct thing
to do is to use cpu_map.xml.

All data files were fixed by running the following command:

    ./cpu-cpuid.py diff *.json

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-10 11:07:23 +01:00
Jiri Denemark
4ca81baa23 cputest: Add data for Intel(R) Core(TM) i7-7700 CPU
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-11-07 23:40:47 +01:00
Jiri Denemark
d85ae683e5 cputest: Add data for Intel(R) Xeon(R) CPU E5-2650 v4
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-11-07 23:40:47 +01:00
Jiri Denemark
6f10044d4f cputest: Do not drop v[0-9] from CPU names
Version is a significant part of some Xeon CPUs.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-11-07 23:40:47 +01:00
Jiri Denemark
c7d27105cb cputest: Add query-cpu-definitions reply for Xeon-E7-8890
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-17 22:37:04 +02:00
Jiri Denemark
637d2ce91a cputest: Update Xeon-E7-8890 data
Without the fix in the previous patch the JSON data from QEMU would be
interpreted as Haswell-noTSX because x86DataFilterTSX would filter rtm
and hle features as a result of

    family == 6 && model == 63 && stepping < 4

test even though this CPU has stepping == 4.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-17 22:37:04 +02:00
Jiri Denemark
91d69cb03e cputest: Make a crippled version of Core-i7-2600
xsaveopt is artificially removed from the host to test disabled feature
which is only included in QEMU's version of the CPU model.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-16 09:23:21 +02:00
Jiri Denemark
911643ce45 cputest: Update Core-i7-2600 data
arat is now enabled even if the hardware does not support it.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-16 09:23:21 +02:00
Jiri Denemark
66b9f3ec9c cputest: Add query-cpu-definitions reply for Xeon-E3-1245
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-16 09:23:21 +02:00
Jiri Denemark
29a16fb618 cputest: Update Xeon-E3-1245 data
xsaves is supported by current QEMU/KVM on this CPU.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-16 09:23:21 +02:00
Jiri Denemark
8e72c612fe cputest: Add query-cpu-definitions reply for Xeon-E7-4830
This CPU was incorrectly detected as SandyBridge before because the
number of additional <feature> elements was the same for both
SandyBridge and Westmere CPU models, but SandyBridge is newer (the CPU
signature does not help here because it doesn't match any signature
defined in cpu_map.xml). But since QEMU's version of SandyBridge CPU
model contains xsaveopt which needs to be disabled, Westmere becomes the
best CPU model when translating CPUID data to virCPUDef. Unfortunately,
this doesn't help with translating the data we got from QEMU and the CPU
model is still computed as SandyBridge in this case.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-16 09:23:21 +02:00
Jiri Denemark
3479f297b3 cputest: Add CPUID data for Intel(R) Xeon(R) CPU E7-4830
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-16 09:23:21 +02:00
Jiri Denemark
11eddf3de0 cputest: Add query-cpu-definitions reply for Core-i5-2540M
The unavailable features do not make any difference in this case,
because this is a SandyBridge CPU which has an empty list of unavailable
features.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-16 09:23:20 +02:00
Jiri Denemark
7bca16937a cputest: Test CPU usability blockers
Gather query-cpu-definitions results and use them for testing CPU model
usability blockers in CPUID to virCPUDef translation.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-16 09:23:20 +02:00
Jiri Denemark
9d62af7283 cputest: Avoid calling json_reformat in cpu-parse.sh
Various version of json_reformat use different number of spaces for
indenting. Let's use a simple python reformatter to gain full control
over the formatting for consistent results.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
2017-10-16 09:23:20 +02:00
Jiri Denemark
4fd179f518 cpu_conf: Drop updateCPU from virCPUDefFormat
In the past we updated host-model CPUs with host CPU data by adding a
model and features, but keeping the host-model mode. And since the CPU
model is not normally formatted for host-model CPU defs, we had to pass
the updateCPU flag to the formatting code to be able to properly output
updated host-model CPUs. Libvirt doesn't do this anymore, host-model
CPUs are turned into custom mode CPUs once updated with host CPU data
and thus there's no reason for keeping the hacks inside CPU XML
formatters.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-09-21 15:23:39 +02:00
Andrea Bolognani
f34fdd5ab6 python: Don't hardcode interpreter path
This is particularly useful on operating systems that don't ship
Python as part of the base system (eg. FreeBSD) while still working
just as well as it did before on Linux.

While at it, make it explicit that our scripts are only going to
work with Python 2, and remove the usage of unbuffered I/O, which
as far as I can tell has no effect on the output files.

Signed-off-by: Andrea Bolognani <abologna@redhat.com>
2017-09-19 16:04:53 +02:00
Jiri Denemark
848b72421f cpu: Add new Skylake-Server CPU model
Available since QEMU 2.10.0 (specifically commit
v2.9.0-2233-g53f9a6f45f).

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2017-09-18 15:10:46 +02:00
Jiri Denemark
78d177df67 cpu: Add clwb/pcommit CPU features
The features were added to QEMU by commit v2.4.0-1690-gf7fda28094 as
Skylake Server features.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2017-09-18 15:10:46 +02:00
Jiri Denemark
1c65bd1402 tests: Add CPUID data for Intel(R) Xeon(R) Gold 6148 CPU
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2017-09-18 15:10:46 +02:00
Brijesh Singh
a0b628432a cpu: Add new EPYC CPU model
Add a new CPU model called 'EPYC' to model processors from AMD EPYC
family (which includes EPYC 76xx,75xx,74xx, 73xx and 72xx).

The following features bits have been added/removed compare to Opteron_G5

Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw,
       fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap, clfshopt, sha
       xsaveopt, xsavec, xgetbv1, arat

Removed: xop, fma4, tbm

The patch is depend on EPYC CPU model supported introduced in qemu [1]

[1] https://patchwork.kernel.org/patch/9902205/

Cc: Tom Lendacky <Thomas.Lendacky@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2017-09-07 13:53:32 +02:00
Jiri Denemark
5c83b3603c tests: Add CPUID data for AMD EPYC 7601 32-Core Processor
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2017-09-07 13:53:32 +02:00
Jiri Denemark
92bd87a239 tests: Add CPUID data for AMD Ryzen 7 1800X Eight-Core Processor
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2017-09-07 13:53:32 +02:00
Jiri Denemark
83e081b8ab cpu_x86: Properly disable unknown CPU features
CPU features unknown to a hypervisor will not be present in dataDisabled
even though the features won't naturally be enabled because.
Thus any features we asked for which are not in dataEnabled should be
considered disabled.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-07-13 09:53:15 +02:00
Jiri Denemark
88705d4c9d cputest: Disable "cmt" feature unknown to QEMU
All CPU features which QEMU does not know about but libvirt knows them
(currently "cmt" is the only one) are implicitly disabled by QEMU and
should be present in x86_64-cpuid-*-disabled.xml.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-27 16:29:27 +02:00
Jiri Denemark
cc033b100c cputest: Disable TSX on broken models
Commit v3.1.0-26-gd60012b4e started filtering hle and rtm features from
broken Intel Haswell CPUs. QEMU implemented similar functionality and
thus it doesn't report rtm and hle features as enabled for Core i5-4670T
CPU anymore.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-27 16:29:27 +02:00
Jiri Denemark
9b6c01845b cputest: Generate data for virCPUUpdateLive
Generated with

    (cd tests/cputestdata; ./cpu-cpuid.py diff x86_64-cpuid-*.json)

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-27 16:29:27 +02:00
Jiri Denemark
2aeef0f6be cputest: Add "diff" command to cpu-cpuid.py
The new command can be used to generate test data for virCPUUpdateLive.

When "cpu-cpuid.py diff x86-cpuid-Something.json" is run, it reads raw
CPUID data stored in x86-cpuid-Something.xml and CPUID data from QEMU
stored in x86-cpuid-Something.json to produce two more CPUID files:
x86-cpuid-Something-enabled.xml and x86-cpuid-Something-disabled.xml.

- x86-cpuid-Something-enabled.xml will contain CPUID bits present in
    x86-cpuid-Something.json (i.e., enabled by QEMU for the "host" CPU)

- x86-cpuid-Something-disabled.xml will contain all CPUID bits from
    x86-cpuid-Something.xml which are not present in
    x86-cpuid-Something.json (i.e., CPUID bits which the host CPU
    supports, but QEMU does not enable them for the "host" CPU)

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-27 16:29:27 +02:00
Jiri Denemark
74f0b0c552 cputest: Add cpuidLeaf helper to cpu-cpuid.py
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-27 16:29:27 +02:00
Jiri Denemark
e7bf3c06b8 cputest: Add cpuidIsSet helper to cpu-cpuid.py
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-27 16:29:27 +02:00
Jiri Denemark
72c44a15c9 cputest: Rename cpu-convert.py script as cpu-cpuid.py
The new script is going to be more general and the original
functionality can be requested by "cpu-cpuid.py convert".

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-27 16:29:27 +02:00
Jiri Denemark
ac49ce42ef cputest: Move instantiation of JSONDecoder in cpu-convert.py
Let's make the object local to the parseFeatureWords function which uses
it.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-27 16:29:27 +02:00
Jiri Denemark
d8b3dd16cb cpu: Move feature expansion out of cpuBaseline
cpuBaseline is responsible for computing a baseline CPU while feature
expansion is done by virCPUExpandFeatures. The cpuBaselineXML wrapper
(used by hypervisor drivers to implement virConnectBaselineCPU API)
calls cpuBaseline followed by virCPUExpandFeatures if requested by
VIR_CONNECT_BASELINE_CPU_EXPAND_FEATURES flag.

The features in the three changed test files had to be sorted using
"sort -k 3" because virCPUExpandFeatures returns a sorted list of
features.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-27 16:29:27 +02:00
Jiri Denemark
065564c840 cputest: New test for Intel Core i7-4510U
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-13 23:49:57 +01:00
Jiri Denemark
5cbc247e0d Do not format <arch> in guest CPU XML
This element is only allowed for host CPUs.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-13 23:49:57 +01:00
Jiri Denemark
3f174b6cba cputest: Add CPUID data for Haswell with TSX
All existing Haswell CPUID data were gathered from CPUs with broken TSX.
Let's add new data for Haswell with correct TSX implementation.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
2017-03-03 19:57:57 +01:00